Revert "add inv option to svshape2 (only 1 bit)"

This reverts commit 77a4f7104968859385e0b8117ea74041cbe6e436.

the reason is that the inclusion of an inv bit can only be
done by reducing the range of "offset", from 0-15 to 0-7.

as this is the *only way* to get at elements on EXTRA2-encoding
it is considered "unwise"

diff --git a/openpower/isa/simplev.mdwn b/openpower/isa/simplev.mdwn
index ff8c71ab9d42b3f56d63ad7a1347a59a9016ca37..9ef43a2e966ae667ac8d6391fd871fb49f0ad887 100644 (file)
--- a/openpower/isa/simplev.mdwn
+++ b/openpower/isa/simplev.mdwn
@@ -346,7 +346,7 @@ Special Registers Altered:
 
 SVM2-Form
 
-* svshape2 offs,inv,yx,rmm,SVd,sk,mm
+* svshape2 offs,yx,rmm,SVd,sk,mm
 
 Pseudo-code:
 
@@ -364,14 +364,12 @@ Pseudo-code:
         shape[18:20] <- 0b000       # ordering xd/yd(/zd)
         if sk = 0 then shape[6:11] <- 0 # ydim
         else           shape[6:11] <- 0b111111 # ydim max
-        shape[21:23] <- (0b00 || inv) # "inverse" on xdim
     else
         shape[18:20] <- 0b010       # ordering yd/xd(/zd)
         if sk = 1 then shape[6:11] <- 0 # ydim
         else           shape[6:11] <- d-1 # ydim max
-        shape[21:23] <- (0b0 || inv || 0b0) # "inverse" ydim
     # offset (the prime purpose of this instruction)
-    shape[24:27] <- (0b0 || offs) # offset extended 1-bit
+    shape[24:27] <- offs        # offset
     if sk = 1 then shape[28:29] <- 0b01 # skip 1st dimension
     else           shape[28:29] <- 0b00 # no skipping
     # select the mode for updating SVSHAPEs

diff --git a/openpower/isatables/fields.text b/openpower/isatables/fields.text
index 01acc23742d2cff94d5685ccb4af664b72d4f2bf..5a08d23eb60385a7ef6d7503a2254721fac8caa3 100644 (file)
--- a/openpower/isatables/fields.text
+++ b/openpower/isatables/fields.text
@@ -307,8 +307,8 @@
     | PO   |  SVxd   |   SVyd | SVzd | SVrm |vf |   XO      |
 
 # 1.6.35.1 SVM2-FORM
-    |0     |6   |9  |10|11      |16    |21 |24|25 |26    |31  |
-    | PO   |offs|inv|yx|   rmm  | SVd  |XO |mm|sk |   XO      |
+    |0     |6     |10|11      |16    |21 |24|25 |26    |31  |
+    | PO   | offs |yx|   rmm  | SVd  |XO |mm|sk |   XO      |
 
 # 1.6.36 SVRM-FORM
     |0     |6     |11  |13   |15   |17   |19   |21  |22   |26     |31 |
@@ -559,9 +559,6 @@
     IMM8 (13:20)
          Immediate field used to specify an 8-bit integer.
          Formats: X
-    inv (9)
-        Field used by the svshape2 instruction for inversion of one dimension
-        Formats: SVM2
     IS (6:10)
          Immediate field used to specify a 5-bit signed inte-
          ger.
@@ -677,7 +674,7 @@
         Field used to specify the number of bytes to move
         in an immediate Move Assist instruction.
         Formats: X
-    offs (6:8)
+    offs (6:9)
         Field used by the svshape2 instruction as an offset
         Formats: SVM2
     OC (6:20)

diff --git a/src/openpower/decoder/isa/test_caller_svshape2.py b/src/openpower/decoder/isa/test_caller_svshape2.py
index e45015b5bcae2ec95b5c55748fce53afdb56ac4d..63ba4b27de9cb4e495a835a0d99a7ca33a6ad0b8 100644 (file)
--- a/src/openpower/decoder/isa/test_caller_svshape2.py
+++ b/src/openpower/decoder/isa/test_caller_svshape2.py
@@ -31,7 +31,7 @@ class SVSTATETestCase(FHDLTestCase):
     def test_0_sv_shape2(self):
         """sets VL=10 (via SVSTATE) then does svshape mm=0, checks SPRs after
         """
-        isa = SVP64Asm(['svshape2 6, 1, 1, 15, 5, 0, 0'
+        isa = SVP64Asm(['svshape2 12, 1, 15, 5, 0, 0'
                         ])
         lst = list(isa)
         print("listing", lst)
@@ -81,9 +81,9 @@ class SVSTATETestCase(FHDLTestCase):
             self.assertEqual(SVSHAPE0.xdimsz, 5)  # set
             self.assertEqual(SVSHAPE0.ydimsz, 2)  # calculated from MVL/xdimsz
             self.assertEqual(SVSHAPE0.skip, 0)   # no skip
-            # invert y rather than x because yx=1
-            self.assertEqual(SVSHAPE0.invxyz, [0, 1, 0])
-            self.assertEqual(SVSHAPE0.offset, 6)
+            # (no inversion possible)
+            self.assertEqual(SVSHAPE0.invxyz, [0, 0, 0])
+            self.assertEqual(SVSHAPE0.offset, 12)
             self.assertEqual(SVSHAPE0.order, (1, 0, 2))  # y,x(,z)
             self.assertEqual(sim.svstate.RMpst, 0)  # mm=0 so persist=0
             self.assertEqual(sim.svstate.SVme, 0b01111)  # same as rmm

diff --git a/src/openpower/sv/trans/svp64.py b/src/openpower/sv/trans/svp64.py
index a89296f17210d91909d3944885835829199bb007..e094392e5560774edd1e5a7969203a10ad5bccae 100644 (file)
--- a/src/openpower/sv/trans/svp64.py
+++ b/src/openpower/sv/trans/svp64.py
@@ -197,11 +197,11 @@ def svshape2(fields):
 
     https://libre-soc.org/openpower/sv/remap/discussion
 
-    * svshape2 offs,inv,yx,rmm,SVd,sk,mm
+    * svshape2 offs,yx,rmm,SVd,sk,mm
 
     # 1.6.35.1 SVM2-FORM from fields.txt
-    # |0     |6   |9  |10|11      |16    |21 |24|25 |26    |31  |
-    # | PO   |offs|inv|yx|   rmm  | SVd  |XO |mm|sk |   XO      |
+    # |0     |6     |10|11      |16    |21 |24|25 |26    |31  |
+    # | PO   | offs |yx|   rmm  | SVd  |XO |mm|sk |   XO      |
 
     note that this fits into the space of svshape and that XO is
     split across 2 areas.
@@ -210,13 +210,12 @@ def svshape2(fields):
     PO = 22
     XO = 0b011001
     XO2 = 0b100 # not really XO2 but hey
-    (offs, inv, yx, rmm, SVd, sk, mm) = fields
+    (offs, yx, rmm, SVd, sk, mm) = fields
     SVd -= 1 # offset by one
 
     return instruction(
         (PO, 0, 5),
-        (offs, 6, 8),  # offset (the whole point of adding svshape2)
-        (inv, 9, 9),   # invert one dimension (depends on yx)
+        (offs, 6, 9),  # offset (the whole point of adding svshape2)
         (yx, 10, 10),  # like svindex
         (rmm, 11, 15), # ditto svindex
         (SVd, 16, 20), # ditto svindex