[AArch64] Handle vector float modes properly in aarch64_output_simd_mov_immediate

	* config/aarch64/aarch64.c (aarch64_output_simd_mov_immediate):
	Handle floating point inner modes properly.

From-SVN: r229454

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f26446c3080fa88afbd1f2878325b97553552568..ac7bba496ae93562b7e8de108822577f864c53e3 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2015-10-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * config/aarch64/aarch64.c (aarch64_output_simd_mov_immediate):
+       Handle floating point inner modes properly.
+
 2015-10-27  Alan Hayward  <alan.hayward@arm.com>
 
        * tree-vect-looop.c

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 49650412bb2efec802e2f69c4bd13a23e5378958..5c8604ffa72799acf62ffd2075489cddceacda4a 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -11450,9 +11450,11 @@ aarch64_output_simd_mov_immediate (rtx const_vector,
   lane_count = width / info.element_width;
 
   mode = GET_MODE_INNER (mode);
-  if (mode == SFmode || mode == DFmode)
+  if (GET_MODE_CLASS (mode) == MODE_FLOAT)
     {
       gcc_assert (info.shift == 0 && ! info.mvn);
+      /* For FP zero change it to a CONST_INT 0 and use the integer SIMD
+        move immediate path.  */
       if (aarch64_float_const_zero_rtx_p (info.value))
         info.value = GEN_INT (0);
       else
@@ -11476,6 +11478,7 @@ aarch64_output_simd_mov_immediate (rtx const_vector,
   mnemonic = info.mvn ? "mvni" : "movi";
   shift_op = info.msl ? "msl" : "lsl";
 
+  gcc_assert (CONST_INT_P (info.value));
   if (lane_count == 1)
     snprintf (templ, sizeof (templ), "%s\t%%d0, " HOST_WIDE_INT_PRINT_HEX,
              mnemonic, UINTVAL (info.value));