fix length=0 in fsw and fsd

diff --git a/id_regs.py b/id_regs.py
index 61fde4a05c958937eb73df7c96351afb0a3a01c3..03e255dc9c570bef9ae3f471a88fd2d4e6a60243 100644 (file)
--- a/id_regs.py
+++ b/id_regs.py
@@ -103,10 +103,10 @@ def find_registers(fname, insn, twin_predication, immed_offset, is_branch):
         elif "f128(" in f:
             src_flen = 128
             dest_flen = 128
-        elif "f64(" in f:
+        elif "f64(" in f or insn == 'fsd':
             src_flen = 64
             dest_flen = 64
-        elif "f32(" in f:
+        elif "f32(" in f or insn == 'fsw':
             src_flen = 32
             dest_flen = 32
         for pattern in patterns: