(no commit message)

diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn
index b1f672599c597e2911934f0d02ca027a1ec99f3c..27e779cddffa84dfa73100f3f6ef489c37fd51fd 100644 (file)
--- a/openpower/sv/svp64.mdwn
+++ b/openpower/sv/svp64.mdwn
@@ -44,8 +44,9 @@ It is also crucial to note that whilst this format augments instruction
 behaviour it works in conjunction with SVSTATE and other [[sv/sprs]].
 
 All bit numbers are in MSB0 form (the bits are numbered from 0 at the MSB
-and counting up as you move to the LSB end). All bit ranges are inclusive
-(so `4:6` means bits 4, 5, and 6).
+on the left
+and counting up as you move rightwards to the LSB end). All bit ranges are inclusive
+(so `4:6` means bits 4, 5, and 6, in MSB0 order).
 
 64-bit instructions are split into two 32-bit words, the prefix and the
 suffix. The prefix always comes before the suffix in PC order.