radeonsi/gfx10: disable DPBB

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index d5906fa22333deaff5d18ff11891ba3196d430e1..d1a4fb2325e14feb91a682b07b7ac5d30c371da6 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -1151,6 +1151,11 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws,
                sscreen->dfsm_allowed = false;
        }
 
+       if (sscreen->info.chip_class == GFX10) {
+               sscreen->dpbb_allowed = false; /* TODO-GFX10: implement this */
+               sscreen->dfsm_allowed = false;
+       }
+
        /* While it would be nice not to have this flag, we are constrained
         * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
         */