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Fixed Anlogic simulation model
author
Miodrag Milanovic
<mmicko@gmail.com>
Fri, 25 Jan 2019 18:25:25 +0000
(19:25 +0100)
committer
Miodrag Milanovic
<mmicko@gmail.com>
Fri, 25 Jan 2019 18:25:25 +0000
(19:25 +0100)
techlibs/anlogic/cells_sim.v
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diff --git
a/techlibs/anlogic/cells_sim.v
b/techlibs/anlogic/cells_sim.v
index 60a3679282f887b19b681da721f0fcf3541f5c26..058e766050e3b671558b3e12a2e819d22f92297c 100644
(file)
--- a/
techlibs/anlogic/cells_sim.v
+++ b/
techlibs/anlogic/cells_sim.v
@@
-17,7
+17,7
@@
module AL_MAP_LUT1 (
);
parameter [1:0] INIT = 2'h0;
parameter EQN = "(A)";
- assign
Y = INIT >> A
;
+ assign
o = INIT >> a
;
endmodule
module AL_MAP_LUT2 (