+2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/10636
+ * config/tc-i386.c (optimize_disp): Set disp32 for 64bit only
+ if there is an ADDR_PREFIX.
+ (i386_finalize_displacement): Repor error if signed 32bit
+ displacement is out of range.
+
2009-09-13 Richard Sandiford <rdsandiford@googlemail.com>
* config/tc-mips.c (MIPS_JALR_HINT_P): Take an expr argument.
i.types[op].bitfield.disp64 = 0;
i.types[op].bitfield.disp32s = 1;
}
- if (fits_in_unsigned_long (disp))
+ if (i.prefix[ADDR_PREFIX]
+ && fits_in_unsigned_long (disp))
i.types[op].bitfield.disp32 = 1;
}
if ((i.types[op].bitfield.disp32
ret = 0;
}
+ else if (flag_code == CODE_64BIT
+ && !i.prefix[ADDR_PREFIX]
+ && exp->X_op == O_constant)
+ {
+ /* Since displacement is signed extended to 64bit, don't allow
+ disp32 and turn off disp32s if they are out of range. */
+ i.types[this_operand].bitfield.disp32 = 0;
+ if (!fits_in_signed_long (exp->X_add_number))
+ {
+ i.types[this_operand].bitfield.disp32s = 0;
+ if (i.types[this_operand].bitfield.baseindex)
+ {
+ as_bad (_("0x%lx out range of signed 32bit displacement"),
+ (long) exp->X_add_number);
+ ret = 0;
+ }
+ }
+ }
+
#if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
else if (exp->X_op != O_constant
&& OUTPUT_FLAVOR == bfd_target_aout_flavour
+2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/10636
+ * gas/i386/disp.d: New.
+ * gas/i386/disp.s: Likewise.
+ * gas/i386/x86-64-disp.d: Likewise.
+ * gas/i386/x86-64-disp.s: Likewise.
+
+ * gas/i386/i386.exp: Run disp and x86-64-disp.
+
+ * gas/i386/x86-64-addr32.s: Add high 32bit displacement tests.
+
+ * gas/i386/x86-64-addr32.d: Updated.
+ * gas/i386/x86-64-addr32-intel.d: Likewise.
+ * gas/i386/x86-64-inval.l: Likewise.
+ * gas/i386/x86-64-prescott.d: Likewise.
+
+ * gas/i386/x86-64-inval.s: Add invalid displacement tests.
+
+ * gas/i386/x86-64-prescott.s: Replace 0x90909090 displacement
+ with 0x909090.
+
2009-09-13 Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/jalr2.s, gas/mips/jalr2.d: New test.
--- /dev/null
+#as: -J
+#objdump: -drw
+#name: i386 displacement
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: 8b 98 ff ff ff 7f mov 0x7fffffff\(%eax\),%ebx
+[ ]*[a-f0-9]+: 8b 98 00 00 00 80 mov -0x80000000\(%eax\),%ebx
+[ ]*[a-f0-9]+: 8b 98 00 00 00 80 mov -0x80000000\(%eax\),%ebx
+[ ]*[a-f0-9]+: 8b 1d ff ff ff 7f mov 0x7fffffff,%ebx
+[ ]*[a-f0-9]+: 8b 1d 00 00 00 80 mov 0x80000000,%ebx
+[ ]*[a-f0-9]+: 8b 1d 00 00 00 80 mov 0x80000000,%ebx
+[ ]*[a-f0-9]+: a1 ff ff ff 7f mov 0x7fffffff,%eax
+[ ]*[a-f0-9]+: a1 00 00 00 80 mov 0x80000000,%eax
+[ ]*[a-f0-9]+: a1 00 00 00 80 mov 0x80000000,%eax
+#pass
--- /dev/null
+ .text
+ mov 0x7fffffff(%eax),%ebx
+ mov 0x80000000(%eax),%ebx
+ mov -0x80000000(%eax),%ebx
+ mov 0x7fffffff,%ebx
+ mov 0x80000000,%ebx
+ mov -0x80000000,%ebx
+ mov 0x7fffffff,%eax
+ mov 0x80000000,%eax
+ mov -0x80000000,%eax
run_dump_test "prescott"
run_dump_test "sib"
run_dump_test "sib-intel"
+ run_dump_test "disp"
run_dump_test "vmx"
run_dump_test "smx"
run_dump_test "suffix"
run_dump_test "x86-64-reg-intel"
run_dump_test "x86-64-sib"
run_dump_test "x86-64-sib-intel"
+ run_dump_test "x86-64-disp"
if { ![istarget "*-*-mingw*"] } then {
run_dump_test "x86-64-opcode-inval"
run_dump_test "x86-64-opcode-inval-intel"
Disassembly of section .text:
-0+000 <.text>:
-[ ]*0:[ ]+67 48 8d 80 00 00 00 00[ ]+addr32[ ]+lea[ ]+rax,\[[re]ax\+(0x)?0\].*
-[ ]*8:[ ]+67 49 8d 80 00 00 00 00[ ]+addr32[ ]+lea[ ]+rax,\[r8d?\+(0x)?0\].*
-[ ]*10:[ ]+67 48 8d 05 00 00 00 00[ ]+addr32[ ]+lea[ ]+rax,\[[re]ip\+(0x)?0\].*
-[ ]*18:[ ]+67 48 8d 04 25 00 00 00 00[ ]+addr32[ ]+lea[ ]+rax,ds:0x0.*
-[ ]*21:[ ]+67 a0 98 08 60 00[ ]+addr32[ ]+mov[ ]+al,ds:0x600898
-[ ]*27:[ ]+67 66 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+ax,ds:0x600898
-[ ]*2e:[ ]+67 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+eax,ds:0x600898
-[ ]*34:[ ]+67 48 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+rax,ds:0x600898
-[ ]*3b:[ ]+67 a2 98 08 60 00[ ]+addr32[ ]+mov[ ]+ds:0x600898,al
-[ ]*41:[ ]+67 66 a3 98 08 60 00[ ]+addr32[ ]+mov[ ]+ds:0x600898,ax
-[ ]*48:[ ]+67 a3 98 08 60 00[ ]+addr32[ ]+mov[ ]+ds:0x600898,eax
-[ ]*4e:[ ]+67 48 a3 98 08 60 00[ ]+addr32[ ]+mov[ ]+ds:0x600898,rax
+0+ <.text>:
+[ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00 addr32 lea rax,\[eax\+0x0\].*
+[ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00 addr32 lea rax,\[r8d\+0x0\].*
+[ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00 addr32 lea rax,\[eip\+0x0\].*
+[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00 addr32 lea rax,ds:0x0.*
+[ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov al,ds:0x600898
+[ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov ax,ds:0x600898
+[ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov eax,ds:0x600898
+[ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov rax,ds:0x600898
+[ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov rax,ds:0x800898
+[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 addr32 mov rbx,QWORD PTR ds:0x800898
+[ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov ds:0x600898,al
+[ ]*[a-f0-9]+: 67 66 a3 98 08 60 00 addr32 mov ds:0x600898,ax
+[ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov ds:0x600898,eax
+[ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov ds:0x600898,rax
+[ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov ds:0x800898,rax
+[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 addr32 mov QWORD PTR ds:0x800898,rbx
#pass
Disassembly of section .text:
-0+000 <.text>:
-[ ]*0:[ ]+67 48 8d 80 00 00 00 00[ ]+(addr32[ ]+)?lea[ ]+0x0\(%eax\),%rax.*
-[ ]*8:[ ]+67 49 8d 80 00 00 00 00[ ]+(addr32[ ]+)?lea[ ]+0x0\(%r8d\),%rax.*
-[ ]*10:[ ]+67 48 8d 05 00 00 00 00[ ]+(addr32[ ]+)?lea[ ]+0x0\(%eip\),%rax.*
-[ ]*18:[ ]+67 48 8d 04 25 00 00 00 00[ ]+addr32[ ]+lea[ ]+0x0,%rax.*
-[ ]*21:[ ]+67 a0 98 08 60 00[ ]+addr32[ ]+mov[ ]+0x600898,%al
-[ ]*27:[ ]+67 66 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+0x600898,%ax
-[ ]*2e:[ ]+67 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+0x600898,%eax
-[ ]*34:[ ]+67 48 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+0x600898,%rax
-[ ]*3b:[ ]+67 a2 98 08 60 00[ ]+addr32[ ]+mov[ ]+%al,0x600898
-[ ]*41:[ ]+67 66 a3 98 08 60 00[ ]+addr32[ ]+mov[ ]+%ax,0x600898
-[ ]*48:[ ]+67 a3 98 08 60 00[ ]+addr32[ ]+mov[ ]+%eax,0x600898
-[ ]*4e:[ ]+67 48 a3 98 08 60 00[ ]+addr32[ ]+mov[ ]+%rax,0x600898
+0+ <.text>:
+[ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00 addr32 lea 0x0\(%eax\),%rax.*
+[ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00 addr32 lea 0x0\(%r8d\),%rax.*
+[ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00 addr32 lea 0x0\(%eip\),%rax.*
+[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00 addr32 lea 0x0,%rax.*
+[ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov 0x600898,%al
+[ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov 0x600898,%ax
+[ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov 0x600898,%eax
+[ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov 0x600898,%rax
+[ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov 0x800898,%rax
+[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 addr32 mov 0x800898,%rbx
+[ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov %al,0x600898
+[ ]*[a-f0-9]+: 67 66 a3 98 08 60 00 addr32 mov %ax,0x600898
+[ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov %eax,0x600898
+[ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov %rax,0x600898
+[ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov %rax,0x800898
+[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 addr32 mov %rbx,0x800898
#pass
addr32 mov 0x600898,%ax
addr32 mov 0x600898,%eax
addr32 mov 0x600898,%rax
+ addr32 mov 0x800898,%rax
+ addr32 mov 0x800898,%rbx
addr32 mov %al,0x600898
addr32 mov %ax,0x600898
addr32 mov %eax,0x600898
addr32 mov %rax,0x600898
+ addr32 mov %rax,0x800898
+ addr32 mov %rbx,0x800898
--- /dev/null
+#as: -J
+#objdump: -drw
+#name: x86-64 displacement
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: 8b 98 ff ff ff 7f mov 0x7fffffff\(%rax\),%ebx
+[ ]*[a-f0-9]+: 8b 98 00 00 00 80 mov -0x80000000\(%rax\),%ebx
+[ ]*[a-f0-9]+: 8b 1c 25 00 00 00 80 mov 0xffffffff80000000,%ebx
+[ ]*[a-f0-9]+: 8b 1c 25 00 00 00 80 mov 0xffffffff80000000,%ebx
+[ ]*[a-f0-9]+: 8b 1c 25 ff ff ff 7f mov 0x7fffffff,%ebx
+[ ]*[a-f0-9]+: 8b 04 25 00 00 00 80 mov 0xffffffff80000000,%eax
+[ ]*[a-f0-9]+: 8b 04 25 00 00 00 80 mov 0xffffffff80000000,%eax
+[ ]*[a-f0-9]+: 8b 04 25 ff ff ff 7f mov 0x7fffffff,%eax
+[ ]*[a-f0-9]+: a1 00 00 00 80 00 00 00 00 mov 0x80000000,%eax
+#pass
--- /dev/null
+ mov 0x7fffffff(%rax),%ebx
+ mov -0x80000000(%rax),%ebx
+ mov -0x80000000,%ebx
+ mov 0xffffffff80000000,%ebx
+ mov 0x7fffffff,%ebx
+ mov -0x80000000,%eax
+ mov 0xffffffff80000000,%eax
+ mov 0x7fffffff,%eax
+ mov 0x80000000,%eax
.*:62: Error: .*
.*:63: Error: .*
.*:64: Error: .*
+.*:66: Error: .*
.*:67: Error: .*
-.*:68: Error: .*
-.*:69: Error: .*
.*:70: Error: .*
.*:71: Error: .*
.*:72: Error: .*
.*:98: Error: .*
.*:99: Error: .*
.*:100: Error: .*
+.*:101: Error: .*
+.*:102: Error: .*
+.*:103: Error: .*
GAS LISTING .*
[ ]*63[ ]+movnti %ax, \(%rax\)
[ ]*64[ ]+movntiw %ax, \(%rax\)
[ ]*65[ ]+
-[ ]*66[ ]+\.intel_syntax noprefix
-[ ]*67[ ]+cmpxchg16b dword ptr \[rax\] \# Must be oword
-[ ]*68[ ]+movq xmm1, XMMWORD PTR \[rsp\]
-[ ]*69[ ]+movq xmm1, DWORD PTR \[rsp\]
-[ ]*70[ ]+movq xmm1, WORD PTR \[rsp\]
-[ ]*71[ ]+movq xmm1, BYTE PTR \[rsp\]
-[ ]*72[ ]+movq XMMWORD PTR \[rsp\],xmm1
-[ ]*73[ ]+movq DWORD PTR \[rsp\],xmm1
-[ ]*74[ ]+movq WORD PTR \[rsp\],xmm1
-[ ]*75[ ]+movq BYTE PTR \[rsp\],xmm1
-[ ]*76[ ]+fnstsw eax
-[ ]*77[ ]+fnstsw al
-[ ]*78[ ]+fstsw eax
-[ ]*79[ ]+fstsw al
-[ ]*80[ ]+in rax,8
-[ ]*81[ ]+out 8,rax
-[ ]*82[ ]+movsx ax, \[rax\]
-[ ]*83[ ]+movsx eax, \[rax\]
-[ ]*84[ ]+movsx rax, \[rax\]
-[ ]*85[ ]+movzx ax, \[rax\]
-[ ]*86[ ]+movzx eax, \[rax\]
-[ ]*87[ ]+movzx rax, \[rax\]
-[ ]*88[ ]+movnti word ptr \[rax\], ax
-[ ]*89[ ]+calld eax \# 32-bit data size not allowed
-[ ]*90[ ]+calld \[ax\] \# 32-bit data size not allowed
-[ ]*91[ ]+calld \[eax\] \# 32-bit data size not allowed
-[ ]*92[ ]+calld \[r8\] \# 32-bit data size not allowed
-[ ]*93[ ]+calld \[rax\] \# 32-bit data size not allowed
-[ ]*94[ ]+callq \[ax\] \# no 16-bit addressing
-[ ]*95[ ]+jmpd eax \# 32-bit data size not allowed
-[ ]*96[ ]+jmpd \[ax\] \# 32-bit data size not allowed
-[ ]*97[ ]+jmpd \[eax\] \# 32-bit data size not allowed
-[ ]*98[ ]+jmpd \[r8\] \# 32-bit data size not allowed
-[ ]*99[ ]+jmpd \[rax\] \# 32-bit data size not allowed
-[ ]*100[ ]+jmpq \[ax\] \# no 16-bit addressing
+[ ]*66[ ]+mov 0x80000000\(%rax\),%ebx
+[ ]*67[ ]+mov 0x80000000,%ebx
+[ ]*68[ ]+
+[ ]*69[ ]+\.intel_syntax noprefix
+[ ]*70[ ]+cmpxchg16b dword ptr \[rax\] \# Must be oword
+[ ]*71[ ]+movq xmm1, XMMWORD PTR \[rsp\]
+[ ]*72[ ]+movq xmm1, DWORD PTR \[rsp\]
+[ ]*73[ ]+movq xmm1, WORD PTR \[rsp\]
+[ ]*74[ ]+movq xmm1, BYTE PTR \[rsp\]
+[ ]*75[ ]+movq XMMWORD PTR \[rsp\],xmm1
+[ ]*76[ ]+movq DWORD PTR \[rsp\],xmm1
+[ ]*77[ ]+movq WORD PTR \[rsp\],xmm1
+[ ]*78[ ]+movq BYTE PTR \[rsp\],xmm1
+[ ]*79[ ]+fnstsw eax
+[ ]*80[ ]+fnstsw al
+[ ]*81[ ]+fstsw eax
+[ ]*82[ ]+fstsw al
+[ ]*83[ ]+in rax,8
+[ ]*84[ ]+out 8,rax
+[ ]*85[ ]+movsx ax, \[rax\]
+[ ]*86[ ]+movsx eax, \[rax\]
+[ ]*87[ ]+movsx rax, \[rax\]
+[ ]*88[ ]+movzx ax, \[rax\]
+[ ]*89[ ]+movzx eax, \[rax\]
+[ ]*90[ ]+movzx rax, \[rax\]
+[ ]*91[ ]+movnti word ptr \[rax\], ax
+[ ]*92[ ]+calld eax \# 32-bit data size not allowed
+[ ]*93[ ]+calld \[ax\] \# 32-bit data size not allowed
+[ ]*94[ ]+calld \[eax\] \# 32-bit data size not allowed
+[ ]*95[ ]+calld \[r8\] \# 32-bit data size not allowed
+[ ]*96[ ]+calld \[rax\] \# 32-bit data size not allowed
+[ ]*97[ ]+callq \[ax\] \# no 16-bit addressing
+[ ]*98[ ]+jmpd eax \# 32-bit data size not allowed
+[ ]*99[ ]+jmpd \[ax\] \# 32-bit data size not allowed
+[ ]*100[ ]+jmpd \[eax\] \# 32-bit data size not allowed
+[ ]*101[ ]+jmpd \[r8\] \# 32-bit data size not allowed
+[ ]*102[ ]+jmpd \[rax\] \# 32-bit data size not allowed
+[ ]*103[ ]+jmpq \[ax\] \# no 16-bit addressing
movnti %ax, (%rax)
movntiw %ax, (%rax)
+mov 0x80000000(%rax),%ebx
+mov 0x80000000,%ebx
+
.intel_syntax noprefix
cmpxchg16b dword ptr [rax] # Must be oword
movq xmm1, XMMWORD PTR [rsp]
4: 66 0f d0 ca [ ]*addsubpd %xmm2,%xmm1
8: f2 0f d0 13 [ ]*addsubps \(%rbx\),%xmm2
c: f2 0f d0 dc [ ]*addsubps %xmm4,%xmm3
- 10: df 88 90 90 90 90 [ ]*fisttp -0x6f6f6f70\(%rax\)
- 16: db 88 90 90 90 90 [ ]*fisttpl -0x6f6f6f70\(%rax\)
- 1c: dd 88 90 90 90 90 [ ]*fisttpll -0x6f6f6f70\(%rax\)
+ 10: df 88 90 90 90 00 [ ]*fisttp 0x909090\(%rax\)
+ 16: db 88 90 90 90 00 [ ]*fisttpl 0x909090\(%rax\)
+ 1c: dd 88 90 90 90 00 [ ]*fisttpll 0x909090\(%rax\)
22: 66 0f 7c 65 00 [ ]*haddpd 0x0\(%rbp\),%xmm4
27: 66 0f 7c ee [ ]*haddpd %xmm6,%xmm5
2b: f2 0f 7c 37 [ ]*haddps \(%rdi\),%xmm6
addsubpd %xmm2,%xmm1
addsubps (%rbx),%xmm2
addsubps %xmm4,%xmm3
- fisttp 0x90909090(%rax)
- fisttpl 0x90909090(%rax)
- fisttpll 0x90909090(%rax)
+ fisttp 0x909090(%rax)
+ fisttpl 0x909090(%rax)
+ fisttpll 0x909090(%rax)
haddpd 0x0(%rbp),%xmm4
haddpd %xmm6,%xmm5
haddps (%rdi),%xmm6