#define BRW_SURFACE_BUFFER 4
#define BRW_SURFACE_NULL 7
+#define GEN7_SURFACE_ARYSPC_FULL 0
+#define GEN7_SURFACE_ARYSPC_LOD0 1
+
/* Surface state DW2 */
#define BRW_SURFACE_HEIGHT_SHIFT 19
#define BRW_SURFACE_HEIGHT_MASK INTEL_MASK(31, 19)
#define GEN7_SURFACE_MULTISAMPLECOUNT_1 0
#define GEN7_SURFACE_MULTISAMPLECOUNT_4 2
#define GEN7_SURFACE_MULTISAMPLECOUNT_8 3
+#define GEN7_SURFACE_MSFMT_MSS 0
+#define GEN7_SURFACE_MSFMT_DEPTH_STENCIL 1
/* Surface state DW5 */
#define BRW_SURFACE_X_OFFSET_SHIFT 25