+++ /dev/null
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9260=y
-CONFIG_MACH_QIL_A9260=y
-CONFIG_AT91_SLOW_CLOCK=y
-CONFIG_AT91_EARLY_USART0=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=64M console=ttyS1,115200"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_MMC=y
-CONFIG_MMC_AT91=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_M41T94=y
-CONFIG_EXT2_FS=y
-CONFIG_FUSE_FS=m
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_UBIFS_FS_XATTR=y
-CONFIG_UBIFS_FS_ADVANCED_COMPR=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
+++ /dev/null
-From a3e08beea8bf5e96e1237eef4a82f4a2fdd5286b Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Thu, 19 Jul 2012 14:19:59 +0200
-Subject: [PATCH] Add support for the Calao-systems QIL-A9260
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
----
- board/qil_a9260/nandflash/Makefile | 122 ++++++++++++++
- board/qil_a9260/nandflash/qil-a9260.h | 109 ++++++++++++
- board/qil_a9260/qil_a9260.c | 298 +++++++++++++++++++++++++++++++++
- crt0_gnu.S | 7 +
- include/part.h | 6 +-
- 5 files changed, 541 insertions(+), 1 deletions(-)
- create mode 100644 board/qil_a9260/nandflash/Makefile
- create mode 100644 board/qil_a9260/nandflash/qil-a9260.h
- create mode 100644 board/qil_a9260/qil_a9260.c
-
-diff --git a/board/qil_a9260/nandflash/Makefile b/board/qil_a9260/nandflash/Makefile
-new file mode 100644
-index 0000000..209a25f
---- /dev/null
-+++ b/board/qil_a9260/nandflash/Makefile
-@@ -0,0 +1,122 @@
-+# TODO: set this appropriately for your local toolchain
-+ifndef ERASE_FCT
-+ERASE_FCT=rm -f
-+endif
-+ifndef CROSS_COMPILE
-+CROSS_COMPILE=arm-elf-
-+endif
-+
-+TOOLCHAIN=gcc
-+
-+BOOTSTRAP_PATH=../../..
-+
-+# NandFlashBoot Configuration for QIL-A9260
-+
-+# Target name (case sensitive!!!)
-+TARGET=AT91SAM9260
-+# Board name (case sensitive!!!)
-+BOARD=qil_a9260
-+# Link Address and Top_of_Memory
-+LINK_ADDR=0x200000
-+TOP_OF_MEMORY=0x301000
-+# Name of current directory
-+PROJECT=nandflash
-+
-+ifndef BOOT_NAME
-+BOOT_NAME=$(PROJECT)_$(BOARD)
-+endif
-+
-+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+
-+AS=$(CROSS_COMPILE)gcc
-+CC=$(CROSS_COMPILE)gcc
-+LD=$(CROSS_COMPILE)gcc
-+NM= $(CROSS_COMPILE)nm
-+SIZE=$(CROSS_COMPILE)size
-+OBJCOPY=$(CROSS_COMPILE)objcopy
-+OBJDUMP=$(CROSS_COMPILE)objdump
-+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
-+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
-+
-+# Linker flags.
-+# -Wl,...: tell GCC to pass this to linker.
-+# -Map: create map file
-+# --cref: add cross reference to map file
-+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
-+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
-+OBJS=crt0_gnu.o
-+
-+endif
-+
-+OBJS+=\
-+ $(BOARD).o \
-+ main.o \
-+ gpio.o \
-+ pmc.o \
-+ debug.o \
-+ sdramc.o \
-+ nandflash.o \
-+ _udivsi3.o \
-+ _umodsi3.o \
-+ div0.o \
-+ udiv.o \
-+ string.o
-+
-+
-+rebuild: clean all
-+
-+all: $(BOOT_NAME)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+$(BOOT_NAME): $(OBJS)
-+ $(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
-+ $(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
-+endif
-+
-+
-+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
-+
-+main.o: $(BOOTSTRAP_PATH)/main.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
-+
-+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
-+
-+pmc.o: $(BOOTSTRAP_PATH)/driver/pmc.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
-+
-+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
-+
-+sdramc.o: $(BOOTSTRAP_PATH)/driver/sdramc.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
-+
-+dataflash.o: $(BOOTSTRAP_PATH)/driver/dataflash.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
-+
-+nandflash.o: $(BOOTSTRAP_PATH)/driver/nandflash.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
-+
-+crt0_gnu.o: $(BOOTSTRAP_PATH)/crt0_gnu.S
-+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
-+
-+div0.o: $(BOOTSTRAP_PATH)/lib/div0.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
-+
-+string.o: $(BOOTSTRAP_PATH)/lib/string.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
-+
-+udiv.o: $(BOOTSTRAP_PATH)/lib/udiv.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
-+
-+_udivsi3.o: $(BOOTSTRAP_PATH)/lib/_udivsi3.S
-+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
-+
-+_umodsi3.o: $(BOOTSTRAP_PATH)/lib/_umodsi3.S
-+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
-+
-+clean:
-+ $(ERASE_FCT) *.o *.bin *.elf *.map
-diff --git a/board/qil_a9260/nandflash/qil-a9260.h b/board/qil_a9260/nandflash/qil-a9260.h
-new file mode 100644
-index 0000000..c87002e
---- /dev/null
-+++ b/board/qil_a9260/nandflash/qil-a9260.h
-@@ -0,0 +1,109 @@
-+/* ----------------------------------------------------------------------------
-+ * ATMEL Microcontroller Software Support - ROUSSET -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name : qil-a9260.h
-+ * Object :
-+ * Creation : GH July 19th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#ifndef _QIL_A9260_H
-+#define _QIL_A9260_H
-+
-+/* ******************************************************************* */
-+/* PMC Settings */
-+/* */
-+/* The main oscillator is enabled as soon as possible in the c_startup */
-+/* and MCK is switched on the main oscillator. */
-+/* PLL initialization is done later in the hw_init() function */
-+/* ******************************************************************* */
-+#define MASTER_CLOCK (180000000/2)
-+#define PLL_LOCK_TIMEOUT 1000000
-+
-+#define PLLA_SETTINGS 0x20593F06
-+#define PLLB_SETTINGS 0x10483F0E
-+
-+/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
-+#define MCKR_SETTINGS (AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
-+#define MCKR_CSS_SETTINGS (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
-+
-+/* ******************************************************************* */
-+/* NandFlash Settings */
-+/* */
-+/* ******************************************************************* */
-+#define AT91C_SMARTMEDIA_BASE 0x40000000
-+
-+#define AT91_SMART_MEDIA_ALE (1 << 21) /* our ALE is AD21 */
-+#define AT91_SMART_MEDIA_CLE (1 << 22) /* our CLE is AD22 */
-+
-+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
-+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
-+
-+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
-+
-+
-+/* ******************************************************************** */
-+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000.*/
-+/* Please refer to SMC section in AT91SAM datasheet to learn how */
-+/* to generate these values. */
-+/* ******************************************************************** */
-+#define AT91C_SM_NWE_SETUP (1 << 0)
-+#define AT91C_SM_NCS_WR_SETUP (0 << 8)
-+#define AT91C_SM_NRD_SETUP (1 << 16)
-+#define AT91C_SM_NCS_RD_SETUP (0 << 24)
-+
-+#define AT91C_SM_NWE_PULSE (3 << 0)
-+#define AT91C_SM_NCS_WR_PULSE (3 << 8)
-+#define AT91C_SM_NRD_PULSE (3 << 16)
-+#define AT91C_SM_NCS_RD_PULSE (3 << 24)
-+
-+#define AT91C_SM_NWE_CYCLE (5 << 0)
-+#define AT91C_SM_NRD_CYCLE (5 << 16)
-+#define AT91C_SM_TDF (2 << 16)
-+
-+/* ******************************************************************* */
-+/* BootStrap Settings */
-+/* */
-+/* ******************************************************************* */
-+#define IMG_ADDRESS 0x20000 /* Image Address in NandFlash */
-+#define IMG_SIZE 0x40000 /* Image Size in NandFlash */
-+
-+#define MACH_TYPE 0x6AF /* QIL-A9260 */
-+#define JUMP_ADDR 0x23F00000 /* Final Jump Address */
-+
-+/* ******************************************************************* */
-+/* Application Settings */
-+/* ******************************************************************* */
-+#undef CFG_DEBUG
-+#undef CFG_DATAFLASH
-+
-+#define CFG_NANDFLASH
-+#undef NANDFLASH_SMALL_BLOCKS /* NANDFLASH_LARGE_BLOCKS used instead */
-+
-+#define CFG_HW_INIT
-+#define CFG_SDRAM
-+
-+#endif /* _QIL_A9260_H */
-diff --git a/board/qil_a9260/qil_a9260.c b/board/qil_a9260/qil_a9260.c
-new file mode 100644
-index 0000000..ae122e7
---- /dev/null
-+++ b/board/qil_a9260/qil_a9260.c
-@@ -0,0 +1,298 @@
-+/* ----------------------------------------------------------------------------
-+ * ATMEL Microcontroller Software Support - ROUSSET -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaiimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name : qil_a9260.c
-+ * Object :
-+ * Creation : GH July 19th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#include "../../include/part.h"
-+#include "../../include/gpio.h"
-+#include "../../include/pmc.h"
-+#include "../../include/debug.h"
-+#include "../../include/sdramc.h"
-+#include "../../include/main.h"
-+#ifdef CFG_NANDFLASH
-+#include "../../include/nandflash.h"
-+#endif
-+#ifdef CFG_DATAFLASH
-+#include "../../include/dataflash.h"
-+#endif
-+
-+static inline unsigned int get_cp15(void)
-+{
-+ unsigned int value;
-+ __asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
-+ return value;
-+}
-+
-+static inline void set_cp15(unsigned int value)
-+{
-+ __asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
-+}
-+
-+#ifdef CFG_HW_INIT
-+/*----------------------------------------------------------------------------*/
-+/* \fn hw_init */
-+/* \brief This function performs very low level HW initialization */
-+/* This function is invoked as soon as possible during the c_startup */
-+/* The bss segment must be initialized */
-+/*----------------------------------------------------------------------------*/
-+void hw_init(void)
-+{
-+ unsigned int cp15;
-+
-+ /* Configure PIOs */
-+ const struct pio_desc hw_pio[] = {
-+#ifdef CFG_DEBUG
-+ {"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Disable watchdog */
-+ writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
-+
-+ /* At this stage the main oscillator is supposed to be enabled
-+ * PCK = MCK = MOSC */
-+
-+ /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
-+ pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+ /* PCK = PLLA = 2 * MCK */
-+ pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
-+ /* Switch MCK on PLLA output */
-+ pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+ /* Configure PLLB */
-+ pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+ /* Configure CP15 */
-+ cp15 = get_cp15();
-+ cp15 |= I_CACHE;
-+ set_cp15(cp15);
-+
-+ /* Configure the PIO controller */
-+ pio_setup(hw_pio);
-+
-+ /* Configure the EBI Slave Slot Cycle to 64 */
-+ writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
-+
-+#ifdef CFG_DEBUG
-+ /* Enable Debug messages on the DBGU */
-+ dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
-+
-+ dbg_print("Start AT91Bootstrap...\n\r");
-+#endif /* CFG_DEBUG */
-+
-+#ifdef CFG_SDRAM
-+ /* Initialize the matrix */
-+ writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBICSA);
-+
-+ /* Configure SDRAM Controller */
-+ sdram_init( AT91C_SDRAMC_NC_9 |
-+ AT91C_SDRAMC_NR_13 |
-+ AT91C_SDRAMC_CAS_2 |
-+ AT91C_SDRAMC_NB_4_BANKS |
-+ AT91C_SDRAMC_DBW_32_BITS |
-+ AT91C_SDRAMC_TWR_2 |
-+ AT91C_SDRAMC_TRC_7 |
-+ AT91C_SDRAMC_TRP_2 |
-+ AT91C_SDRAMC_TRCD_2 |
-+ AT91C_SDRAMC_TRAS_5 |
-+ AT91C_SDRAMC_TXSR_8, /* Control Register */
-+ (MASTER_CLOCK * 7)/1000000, /* Refresh Timer Register */
-+ AT91C_SDRAMC_MD_SDRAM); /* SDRAM (no low power) */
-+
-+
-+#endif /* CFG_SDRAM */
-+}
-+#endif /* CFG_HW_INIT */
-+
-+#ifdef CFG_SDRAM
-+/*------------------------------------------------------------------------------*/
-+/* \fn sdramc_hw_init */
-+/* \brief This function performs SDRAMC HW initialization */
-+/*------------------------------------------------------------------------------*/
-+void sdramc_hw_init(void)
-+{
-+ /* Configure PIOs */
-+/* const struct pio_desc sdramc_pio[] = {
-+ {"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+*/
-+ /* Configure the SDRAMC PIO controller to output PCK0 */
-+/* pio_setup(sdramc_pio); */
-+
-+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
-+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
-+
-+}
-+#endif /* CFG_SDRAM */
-+
-+#ifdef CFG_DATAFLASH
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn df_recovery */
-+/* \brief This function erases DataFlash Page 0 if USR PB is pressed */
-+/* during boot sequence */
-+/*------------------------------------------------------------------------------*/
-+void df_recovery(AT91PS_DF pDf)
-+{
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
-+ /* Configure PIOs */
-+ const struct pio_desc usrpb_pio[] = {
-+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Configure the PIO controller */
-+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+ pio_setup(usrpb_pio);
-+
-+ /* If USR PB is pressed during Boot sequence */
-+ /* Erase DataFlash Page 0*/
-+ if ( !pio_get_value(AT91C_PIN_PB(10)) )
-+ df_page_erase(pDf, 0);
-+#endif
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn df_hw_init */
-+/* \brief This function performs DataFlash HW initialization */
-+/*------------------------------------------------------------------------------*/
-+void df_hw_init(void)
-+{
-+ /* Configure PIOs */
-+ const struct pio_desc df_pio[] = {
-+ {"MISO", AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"MOSI", AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"SPCK", AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
-+ {"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Configure the PIO controller */
-+ pio_setup(df_pio);
-+}
-+#endif /* CFG_DATAFLASH */
-+
-+
-+
-+#ifdef CFG_NANDFLASH
-+/*------------------------------------------------------------------------------*/
-+/* \fn nand_recovery */
-+/* \brief This function erases NandFlash Block 0 if USR PB is pressed */
-+/* during boot sequence */
-+/*------------------------------------------------------------------------------*/
-+static void nand_recovery(void)
-+{
-+ /* Configure PIOs */
-+ const struct pio_desc usrpb_pio[] = {
-+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Configure the PIO controller */
-+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+ pio_setup(usrpb_pio);
-+
-+ /* If USR PB is pressed during Boot sequence */
-+ /* Erase NandFlash block 0*/
-+ if (!pio_get_value(AT91C_PIN_PB(10)) )
-+ AT91F_NandEraseBlock0();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn nandflash_hw_init */
-+/* \brief NandFlash HW init */
-+/*------------------------------------------------------------------------------*/
-+void nandflash_hw_init(void)
-+{
-+ /* Configure PIOs */
-+ const struct pio_desc nand_pio[] = {
-+ {"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
-+ {"NANDCS", AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
-+ writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
-+
-+ /* Configure SMC CS3 */
-+ writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
-+ writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
-+ writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE) , AT91C_BASE_SMC + SMC_CYCLE3);
-+ writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE |
-+ AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF) , AT91C_BASE_SMC + SMC_CTRL3);
-+
-+ /* Configure the PIO controller */
-+ writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
-+ pio_setup(nand_pio);
-+
-+ nand_recovery();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn nandflash_cfg_16bits_dbw_init */
-+/* \brief Configure SMC in 16 bits mode */
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_16bits_dbw_init(void)
-+{
-+ writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn nandflash_cfg_8bits_dbw_init */
-+/* \brief Configure SMC in 8 bits mode */
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_8bits_dbw_init(void)
-+{
-+ writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+
-+#endif /* #ifdef CFG_NANDFLASH */
-diff --git a/crt0_gnu.S b/crt0_gnu.S
-index 042b617..002feef 100644
---- a/crt0_gnu.S
-+++ b/crt0_gnu.S
-@@ -106,6 +106,13 @@ _relocate_to_sram:
- #endif /* CFG_NORFLASH */
-
- _setup_clocks:
-+/* Test if main osc is bypassed */
-+ ldr r0,=AT91C_PMC_MOR
-+ ldr r1, [r0]
-+ ldr r2,=AT91C_CKGR_OSCBYPASS
-+ ands r1, r1, r2
-+ bne _init_data /* branch if OSCBYPASS=1 */
-+
- /* Test if main oscillator is enabled */
- ldr r0,=AT91C_PMC_SR
- ldr r1, [r0]
-diff --git a/include/part.h b/include/part.h
-index ba5985a..bbd33fe 100644
---- a/include/part.h
-+++ b/include/part.h
-@@ -35,7 +35,11 @@
-
- #ifdef AT91SAM9260
- #include "AT91SAM9260_inc.h"
--#include "at91sam9260ek.h"
-+ #ifdef at91sam9260ek
-+ #include "at91sam9260ek.h"
-+ #elif qil_a9260
-+ #include "qil-a9260.h"
-+ #endif
- #endif
-
- #ifdef AT91SAM9XE
---
-1.5.6.3
-
+++ /dev/null
-From d076aa6182dc6df6bb311e60bbddb03573b9483b Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Fri, 3 Aug 2012 11:25:49 +0200
-Subject: [PATCH] Enable pull-up on Rx serial ports for the CALAO MB-QIL-A9260
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
----
- arch/arm/boards/qil-a9260/init.c | 6 ++++++
- 1 files changed, 6 insertions(+), 0 deletions(-)
-
-diff --git a/arch/arm/boards/qil-a9260/init.c b/arch/arm/boards/qil-a9260/init.c
-index 305d733..b43cace 100644
---- a/arch/arm/boards/qil-a9260/init.c
-+++ b/arch/arm/boards/qil-a9260/init.c
-@@ -196,11 +196,17 @@ device_initcall(qil_a9260_devices_init);
- static int qil_a9260_console_init(void)
- {
- at91_register_uart(0, 0);
-+ at91_set_A_periph(AT91_PIN_PB14, 1); /* Enable pull-up on DRXD */
-+
- at91_register_uart(1, ATMEL_UART_CTS | ATMEL_UART_RTS
- | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
- | ATMEL_UART_RI);
-+
- at91_register_uart(2, ATMEL_UART_CTS | ATMEL_UART_RTS);
-+ at91_set_A_periph(AT91_PIN_PB7, 1); /* Enable pull-up on RXD1 */
-+
- at91_register_uart(3, ATMEL_UART_CTS | ATMEL_UART_RTS);
-+ at91_set_A_periph(AT91_PIN_PB9, 1); /* Enable pull-up on RXD2 */
-
- return 0;
- }
---
-1.5.6.3
-
+++ /dev/null
-From fe6432a9728b62bce3db73c5a4efe026018fd495 Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Fri, 3 Aug 2012 16:45:37 +0200
-Subject: [PATCH] QIL-A9260: rtc modalias m41t48 renamed to rtc-m41t48
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
----
- arch/arm/mach-at91/board-qil-a9260.c | 2 +-
- 1 files changed, 1 insertions(+), 1 deletions(-)
-
-diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
-index bf351e2..c0df05c 100644
---- a/arch/arm/mach-at91/board-qil-a9260.c
-+++ b/arch/arm/mach-at91/board-qil-a9260.c
-@@ -78,7 +78,7 @@ static struct at91_udc_data __initdata ek_udc_data = {
- static struct spi_board_info ek_spi_devices[] = {
- #if defined(CONFIG_RTC_DRV_M41T94)
- { /* M41T94 RTC */
-- .modalias = "m41t94",
-+ .modalias = "rtc-m41t94",
- .chip_select = 0,
- .max_speed_hz = 1 * 1000 * 1000,
- .bus_num = 0,
---
-1.5.6.3
-
+++ /dev/null
-From 53bd82b122f4530a98cba45795832820bb1d0b45 Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Mon, 13 Aug 2012 11:26:10 +0200
-Subject: [PATCH] Add support for the Calao-systems TNY-A9G20-LPW
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
----
- board/tny_a9g20_lpw/nandflash/Makefile | 121 ++++++++++++
- board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h | 114 ++++++++++++
- board/tny_a9g20_lpw/tny_a9g20_lpw.c | 243 +++++++++++++++++++++++++
- crt0_gnu.S | 6 +
- include/part.h | 6 +-
- 5 files changed, 489 insertions(+), 1 deletion(-)
- create mode 100644 board/tny_a9g20_lpw/nandflash/Makefile
- create mode 100644 board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
- create mode 100644 board/tny_a9g20_lpw/tny_a9g20_lpw.c
-
-diff --git a/board/tny_a9g20_lpw/nandflash/Makefile b/board/tny_a9g20_lpw/nandflash/Makefile
-new file mode 100644
-index 0000000..7efbea7
---- /dev/null
-+++ b/board/tny_a9g20_lpw/nandflash/Makefile
-@@ -0,0 +1,121 @@
-+# TODO: set this appropriately for your local toolchain
-+ifndef ERASE_FCT
-+ERASE_FCT=rm -f
-+endif
-+ifndef CROSS_COMPILE
-+CROSS_COMPILE=arm-elf-
-+endif
-+
-+TOOLCHAIN=gcc
-+
-+BOOTSTRAP_PATH=../../..
-+
-+# NandFlashBoot Configuration for AT91SAM9260EK
-+
-+# Target name (case sensitive!!!)
-+TARGET=AT91SAM9G20
-+# Board name (case sensitive!!!)
-+BOARD=tny_a9g20_lpw
-+# Link Address and Top_of_Memory
-+LINK_ADDR=0x200000
-+TOP_OF_MEMORY=0x301000
-+# Name of current directory
-+PROJECT=nandflash
-+
-+ifndef BOOT_NAME
-+BOOT_NAME=$(PROJECT)_$(BOARD)
-+endif
-+
-+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+
-+AS=$(CROSS_COMPILE)gcc
-+CC=$(CROSS_COMPILE)gcc
-+LD=$(CROSS_COMPILE)gcc
-+NM= $(CROSS_COMPILE)nm
-+SIZE=$(CROSS_COMPILE)size
-+OBJCOPY=$(CROSS_COMPILE)objcopy
-+OBJDUMP=$(CROSS_COMPILE)objdump
-+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
-+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
-+
-+# Linker flags.
-+# -Wl,...: tell GCC to pass this to linker.
-+# -Map: create map file
-+# --cref: add cross reference to map file
-+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
-+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
-+OBJS=crt0_gnu.o
-+
-+endif
-+
-+OBJS+=\
-+ $(BOARD).o \
-+ main.o \
-+ gpio.o \
-+ pmc.o \
-+ debug.o \
-+ sdramc.o \
-+ nandflash.o \
-+ _udivsi3.o \
-+ _umodsi3.o \
-+ div0.o \
-+ udiv.o \
-+ string.o
-+
-+rebuild: clean all
-+
-+all: $(BOOT_NAME)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+$(BOOT_NAME): $(OBJS)
-+ $(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
-+ $(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
-+endif
-+
-+
-+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
-+
-+main.o: $(BOOTSTRAP_PATH)/main.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
-+
-+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
-+
-+pmc.o: $(BOOTSTRAP_PATH)/driver/pmc.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
-+
-+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
-+
-+sdramc.o: $(BOOTSTRAP_PATH)/driver/sdramc.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
-+
-+dataflash.o: $(BOOTSTRAP_PATH)/driver/dataflash.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
-+
-+nandflash.o: $(BOOTSTRAP_PATH)/driver/nandflash.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
-+
-+crt0_gnu.o: $(BOOTSTRAP_PATH)/crt0_gnu.S
-+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
-+
-+div0.o: $(BOOTSTRAP_PATH)/lib/div0.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
-+
-+string.o: $(BOOTSTRAP_PATH)/lib/string.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
-+
-+udiv.o: $(BOOTSTRAP_PATH)/lib/udiv.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
-+
-+_udivsi3.o: $(BOOTSTRAP_PATH)/lib/_udivsi3.S
-+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
-+
-+_umodsi3.o: $(BOOTSTRAP_PATH)/lib/_umodsi3.S
-+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
-+
-+clean:
-+ $(ERASE_FCT) *.o *.bin *.elf *.map
-diff --git a/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h b/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
-new file mode 100644
-index 0000000..b1f8a1d
---- /dev/null
-+++ b/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
-@@ -0,0 +1,114 @@
-+/* ----------------------------------------------------------------------------
-+ * ATMEL Microcontroller Software Support - ROUSSET -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2008, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name : tny-a9g20-lpw.h
-+ * Object :
-+ * Creation : GH August 13th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#ifndef _TNY_A9G20_LPW_H
-+#define _TNY_A9G20_LPW_H
-+
-+/* ******************************************************************* */
-+/* PMC Settings */
-+/* */
-+/* The main oscillator is enabled as soon as possible in the c_startup */
-+/* and MCK is switched on the main oscillator. */
-+/* PLL initialization is done later in the hw_init() function */
-+/* ******************************************************************* */
-+#define MASTER_CLOCK (100000000)
-+#define PLL_LOCK_TIMEOUT 1000000
-+
-+/* set PLLA to 800Mhz from MAINCK= 12Mhz MULA=199 (0xC7+1= 200), DIVA=0x03 (Fplla=12Mhz x [(199+1)/3]=800Mhz) */
-+#define PLLA_SETTINGS 0x20C73F03
-+#define PLLB_SETTINGS 0x100F3F02
-+
-+/* Switch MCK on PLLA output PCK = PLLA/2 = 3 * MCK */
-+/* LP-SDRAM (fmax=100Mhz) PDIV=0 => PRESCALER CLK=PCLK; */
-+/* MDIV = 2 => PRESCALER CLK / 4 = MCLK=100Mhz */
-+/* PRESCALER CLK = PLLA (800Mhz) / 2 (PRES=1) = 400Mhz */
-+#define MCKR_SETTINGS 0x0204
-+#define MCKR_CSS_SETTINGS (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
-+
-+/* ******************************************************************* */
-+/* NandFlash Settings */
-+/* */
-+/* ******************************************************************* */
-+#define AT91C_SMARTMEDIA_BASE 0x40000000
-+
-+#define AT91_SMART_MEDIA_ALE (1 << 21) /* our ALE is AD21 */
-+#define AT91_SMART_MEDIA_CLE (1 << 22) /* our CLE is AD22 */
-+
-+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
-+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
-+
-+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
-+
-+
-+/* ******************************************************************** */
-+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 100000000.*/
-+/* Please refer to SMC section in AT91SAM9 datasheet to learn how */
-+/* to generate these values. */
-+/* ******************************************************************** */
-+#define AT91C_SM_NWE_SETUP (1 << 0)
-+#define AT91C_SM_NCS_WR_SETUP (0 << 8)
-+#define AT91C_SM_NRD_SETUP (1 << 16)
-+#define AT91C_SM_NCS_RD_SETUP (0 << 24)
-+
-+#define AT91C_SM_NWE_PULSE (3 << 0)
-+#define AT91C_SM_NCS_WR_PULSE (3 << 8)
-+#define AT91C_SM_NRD_PULSE (3 << 16)
-+#define AT91C_SM_NCS_RD_PULSE (3 << 24)
-+
-+#define AT91C_SM_NWE_CYCLE (5 << 0)
-+#define AT91C_SM_NRD_CYCLE (5 << 16)
-+
-+#define AT91C_SM_TDF (2 << 16)
-+
-+/* ******************************************************************* */
-+/* BootStrap Settings */
-+/* */
-+/* ******************************************************************* */
-+#define IMG_ADDRESS 0x20000 /* Image Address in NandFlash */
-+#define IMG_SIZE 0x40000 /* Image Size in NandFlash */
-+
-+#define MACH_TYPE 0x80B /* TNY-A9G20 */
-+#define JUMP_ADDR 0x23F00000 /* Final Jump Address */
-+
-+/* ******************************************************************* */
-+/* Application Settings */
-+/* ******************************************************************* */
-+#undef CFG_DEBUG
-+#undef CFG_DATAFLASH
-+
-+#define CFG_NANDFLASH
-+#undef NANDFLASH_SMALL_BLOCKS /* NANDFLASH_LARGE_BLOCKS used instead */
-+
-+#define CFG_SDRAM
-+#define CFG_HW_INIT
-+
-+#endif /* _TNY_A9G20_LPW_H */
-diff --git a/board/tny_a9g20_lpw/tny_a9g20_lpw.c b/board/tny_a9g20_lpw/tny_a9g20_lpw.c
-new file mode 100644
-index 0000000..cef9055
---- /dev/null
-+++ b/board/tny_a9g20_lpw/tny_a9g20_lpw.c
-@@ -0,0 +1,243 @@
-+/* ----------------------------------------------------------------------------
-+ * ATMEL Microcontroller Software Support - ROUSSET -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2008, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name : tny_a9g20_lpw.c
-+ * Object :
-+ * Creation : GH August 13th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#include "../../include/part.h"
-+#include "../../include/gpio.h"
-+#include "../../include/pmc.h"
-+#include "../../include/debug.h"
-+#include "../../include/sdramc.h"
-+#include "../../include/main.h"
-+#ifdef CFG_NANDFLASH
-+#include "../../include/nandflash.h"
-+#endif
-+
-+static inline unsigned int get_cp15(void)
-+{
-+ unsigned int value;
-+ __asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
-+ return value;
-+}
-+
-+static inline void set_cp15(unsigned int value)
-+{
-+ __asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
-+}
-+
-+#ifdef CFG_HW_INIT
-+/*----------------------------------------------------------------------------*/
-+/* \fn hw_init */
-+/* \brief This function performs very low level HW initialization */
-+/* This function is invoked as soon as possible during the c_startup */
-+/* The bss segment must be initialized */
-+/*----------------------------------------------------------------------------*/
-+void hw_init(void)
-+{
-+ unsigned int cp15;
-+
-+ /* Configure PIOs */
-+ const struct pio_desc hw_pio[] = {
-+#ifdef CFG_DEBUG
-+ {"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Disable watchdog */
-+ writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
-+
-+ /* At this stage the main oscillator is supposed to be enabled
-+ * PCK = MCK = MOSC */
-+ writel(0x00, AT91C_BASE_PMC + PMC_PLLICPR);
-+
-+ /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
-+ pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+ /* PCK = PLLA/2 = 3 * MCK */
-+ pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
-+ /* Switch MCK on PLLA output */
-+ pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+ /* Configure PLLB */
-+ pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+ /* Configure CP15 */
-+ cp15 = get_cp15();
-+ cp15 |= I_CACHE;
-+ set_cp15(cp15);
-+
-+ /* Configure the PIO controller */
-+ pio_setup(hw_pio);
-+
-+ /* Configure the EBI Slave Slot Cycle to 64 */
-+ writel((readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
-+
-+#ifdef CFG_DEBUG
-+ /* Enable Debug messages on the DBGU */
-+ dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
-+
-+ dbg_print("Start AT91Bootstrap...\n\r");
-+#endif /* CFG_DEBUG */
-+
-+#ifdef CFG_SDRAM
-+ /* Initialize the matrix (slow slew rate enabled and LPSDRAM memory voltage = 1.8V) */
-+ writel(((readl(AT91C_BASE_CCFG + CCFG_EBICSA)) | AT91C_EBI_CS1A_SDRAMC | (1<<17)) & ~0x00010000, AT91C_BASE_CCFG + CCFG_EBICSA);
-+
-+ /* Configure SDRAM Controller */
-+ sdram_init( AT91C_SDRAMC_NC_9 |
-+ AT91C_SDRAMC_NR_13 |
-+ AT91C_SDRAMC_CAS_3 |
-+ AT91C_SDRAMC_NB_4_BANKS |
-+ AT91C_SDRAMC_DBW_32_BITS |
-+ AT91C_SDRAMC_TWR_2 |
-+ AT91C_SDRAMC_TRC_7 |
-+ AT91C_SDRAMC_TRP_2 |
-+ AT91C_SDRAMC_TRCD_2 |
-+ AT91C_SDRAMC_TRAS_5 |
-+ AT91C_SDRAMC_TXSR_8, /* Control Register */
-+ (MASTER_CLOCK * 7)/1000000, /* Refresh Timer Register */
-+ AT91C_SDRAMC_MD_LOW_POWER_SDRAM); /* SDRAM (low power) */
-+
-+#endif /* CFG_SDRAM */
-+}
-+#endif /* CFG_HW_INIT */
-+
-+#ifdef CFG_SDRAM
-+/*------------------------------------------------------------------------------*/
-+/* \fn sdramc_hw_init */
-+/* \brief This function performs SDRAMC HW initialization */
-+/*------------------------------------------------------------------------------*/
-+void sdramc_hw_init(void)
-+{
-+ /* Configure PIOs */
-+/* const struct pio_desc sdramc_pio[] = {
-+ {"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+*/
-+ /* Configure the SDRAMC PIO controller to output PCK0 */
-+/* pio_setup(sdramc_pio); */
-+
-+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
-+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
-+
-+}
-+#endif /* CFG_SDRAM */
-+
-+#ifdef CFG_NANDFLASH
-+/*------------------------------------------------------------------------------*/
-+/* \fn nand_recovery */
-+/* \brief This function erases NandFlash Block 0 if BP4 is pressed */
-+/* during boot sequence */
-+/*------------------------------------------------------------------------------*/
-+static void nand_recovery(void)
-+{
-+ /* Configure PIOs */
-+ const struct pio_desc bp4_pio[] = {
-+ {"BP4", AT91C_PIN_PA(31), 0, PIO_PULLUP, PIO_INPUT},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Configure the PIO controller */
-+ writel((1 << AT91C_ID_PIOA), PMC_PCER + AT91C_BASE_PMC);
-+ pio_setup(bp4_pio);
-+
-+ /* If BP4 is pressed during Boot sequence */
-+ /* Erase NandFlash block 0*/
-+ if (!pio_get_value(AT91C_PIN_PA(31)) )
-+ AT91F_NandEraseBlock0();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn nandflash_hw_init */
-+/* \brief NandFlash HW init */
-+/*------------------------------------------------------------------------------*/
-+void nandflash_hw_init(void)
-+{
-+ /* Configure PIOs */
-+ const struct pio_desc nand_pio[] = {
-+ {"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
-+ {"NANDCS", AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
-+ writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
-+
-+ /* Configure SMC CS3 */
-+ writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
-+ writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
-+ writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE) , AT91C_BASE_SMC + SMC_CYCLE3);
-+ writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE |
-+ AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF) , AT91C_BASE_SMC + SMC_CTRL3);
-+
-+ /* Configure the PIO controller */
-+ writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
-+ pio_setup(nand_pio);
-+
-+ nand_recovery();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn nandflash_cfg_16bits_dbw_init */
-+/* \brief Configure SMC in 16 bits mode */
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_16bits_dbw_init(void)
-+{
-+ writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn nandflash_cfg_8bits_dbw_init */
-+/* \brief Configure SMC in 8 bits mode */
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_8bits_dbw_init(void)
-+{
-+ writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+#endif /* #ifdef CFG_NANDFLASH */
-diff --git a/crt0_gnu.S b/crt0_gnu.S
-index 042b617..c6cd49d 100644
---- a/crt0_gnu.S
-+++ b/crt0_gnu.S
-@@ -106,6 +106,12 @@ _relocate_to_sram:
- #endif /* CFG_NORFLASH */
-
- _setup_clocks:
-+/* Test if main osc is bypassed */
-+ ldr r0,=AT91C_PMC_MOR
-+ ldr r1, [r0]
-+ ldr r2,=AT91C_CKGR_OSCBYPASS
-+ ands r1, r1, r2
-+ bne _init_data /* branch if OSCBYPASS=1 */
- /* Test if main oscillator is enabled */
- ldr r0,=AT91C_PMC_SR
- ldr r1, [r0]
-diff --git a/include/part.h b/include/part.h
-index ba5985a..ab79af1 100644
---- a/include/part.h
-+++ b/include/part.h
-@@ -46,7 +46,11 @@
-
- #ifdef AT91SAM9G20
- #include "AT91SAM9260_inc.h"
--#include "at91sam9g20ek.h"
-+ #ifdef at91sam9g20ek
-+ #include "at91sam9g20ek.h"
-+ #elif tny_a9g20_lpw
-+ #include "tny-a9g20-lpw.h"
-+ #endif
- #endif
-
- #ifdef AT91SAM9261
---
-1.7.9.5
-
+++ /dev/null
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_EMBEDDED=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_SOC_AT91SAM9260=y
-CONFIG_SOC_AT91SAM9263=y
-CONFIG_SOC_AT91SAM9G45=y
-CONFIG_SOC_AT91SAM9X5=y
-CONFIG_SOC_AT91SAM9N12=y
-CONFIG_MACH_AT91SAM_DT=y
-CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
-CONFIG_AT91_TIMER_HZ=128
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_UACCESS_WITH_MEMCPY=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
-CONFIG_KEXEC=y
-CONFIG_AUTO_ZRELADDR=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET6_XFRM_MODE_BEET is not set
-CONFIG_IPV6_SIT_6RD=y
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_STANDALONE is not set
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_UBI=y
-CONFIG_MTD_UBI_GLUEBI=y
-CONFIG_PROC_DEVICETREE=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=4
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_ATMEL_PWM=y
-CONFIG_ATMEL_TCLIB=y
-CONFIG_EEPROM_93CX6=m
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-CONFIG_DAVICOM_PHY=y
-CONFIG_MICREL_PHY=y
-# CONFIG_WLAN is not set
-CONFIG_INPUT_POLLDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-# CONFIG_SERIO is not set
-CONFIG_LEGACY_PTY_COUNT=4
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_GPIO=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_AT91SAM9X_WATCHDOG=y
-CONFIG_SSB=m
-CONFIG_FB=y
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_ATMEL=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_ATMEL_LCDC=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_ACORN_8x8=y
-CONFIG_FONT_MINI_4x6=y
-CONFIG_LOGO=y
-CONFIG_USB=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_ACM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_SERIAL=y
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_FTDI_SIO=y
-CONFIG_USB_SERIAL_PL2303=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_AT91=m
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_CDC_COMPOSITE=m
-CONFIG_USB_G_ACM_MS=m
-CONFIG_USB_G_MULTI=m
-CONFIG_USB_G_MULTI_CDC=y
-CONFIG_MMC=y
-CONFIG_MMC_ATMELMCI=y
-CONFIG_MMC_SPI=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AT91RM9200=y
-CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_DMADEVICES=y
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_FANOTIFY=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_UBIFS_FS=y
-CONFIG_UBIFS_FS_ADVANCED_COMPR=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_STRIP_ASM_SYMS=y
-CONFIG_DEBUG_FS=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
-CONFIG_CRYPTO_ECB=y
-CONFIG_CRYPTO_ARC4=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_USER_API_HASH=m
-CONFIG_CRYPTO_USER_API_SKCIPHER=m
-# CONFIG_CRYPTO_HW is not set
-CONFIG_CRC_CCITT=m
-CONFIG_AVERAGE=y
+++ /dev/null
-From 43e8c90f13806405bde8eaaf3a956d0ddc806f64 Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Tue, 2 Oct 2012 09:19:15 +0200
-Subject: [PATCH] Add support for the USB-A9260
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
----
- board/usb_a9260/nandflash/Makefile | 122 ++++++++++++++
- board/usb_a9260/nandflash/usb-a9260.h | 109 ++++++++++++
- board/usb_a9260/usb_a9260.c | 298 +++++++++++++++++++++++++++++++++
- crt0_gnu.S | 7 +
- include/part.h | 6 +-
- 5 files changed, 541 insertions(+), 1 deletion(-)
- create mode 100644 board/usb_a9260/nandflash/Makefile
- create mode 100644 board/usb_a9260/nandflash/usb-a9260.h
- create mode 100644 board/usb_a9260/usb_a9260.c
-
-diff --git a/board/usb_a9260/nandflash/Makefile b/board/usb_a9260/nandflash/Makefile
-new file mode 100644
-index 0000000..02f4b50
---- /dev/null
-+++ b/board/usb_a9260/nandflash/Makefile
-@@ -0,0 +1,122 @@
-+# TODO: set this appropriately for your local toolchain
-+ifndef ERASE_FCT
-+ERASE_FCT=rm -f
-+endif
-+ifndef CROSS_COMPILE
-+CROSS_COMPILE=arm-elf-
-+endif
-+
-+TOOLCHAIN=gcc
-+
-+BOOTSTRAP_PATH=../../..
-+
-+# NandFlashBoot Configuration for USB-A9260
-+
-+# Target name (case sensitive!!!)
-+TARGET=AT91SAM9260
-+# Board name (case sensitive!!!)
-+BOARD=usb_a9260
-+# Link Address and Top_of_Memory
-+LINK_ADDR=0x200000
-+TOP_OF_MEMORY=0x301000
-+# Name of current directory
-+PROJECT=nandflash
-+
-+ifndef BOOT_NAME
-+BOOT_NAME=$(PROJECT)_$(BOARD)
-+endif
-+
-+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+
-+AS=$(CROSS_COMPILE)gcc
-+CC=$(CROSS_COMPILE)gcc
-+LD=$(CROSS_COMPILE)gcc
-+NM= $(CROSS_COMPILE)nm
-+SIZE=$(CROSS_COMPILE)size
-+OBJCOPY=$(CROSS_COMPILE)objcopy
-+OBJDUMP=$(CROSS_COMPILE)objdump
-+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
-+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
-+
-+# Linker flags.
-+# -Wl,...: tell GCC to pass this to linker.
-+# -Map: create map file
-+# --cref: add cross reference to map file
-+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
-+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
-+OBJS=crt0_gnu.o
-+
-+endif
-+
-+OBJS+=\
-+ $(BOARD).o \
-+ main.o \
-+ gpio.o \
-+ pmc.o \
-+ debug.o \
-+ sdramc.o \
-+ nandflash.o \
-+ _udivsi3.o \
-+ _umodsi3.o \
-+ div0.o \
-+ udiv.o \
-+ string.o
-+
-+
-+rebuild: clean all
-+
-+all: $(BOOT_NAME)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+$(BOOT_NAME): $(OBJS)
-+ $(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
-+ $(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
-+endif
-+
-+
-+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
-+
-+main.o: $(BOOTSTRAP_PATH)/main.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
-+
-+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
-+
-+pmc.o: $(BOOTSTRAP_PATH)/driver/pmc.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
-+
-+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
-+
-+sdramc.o: $(BOOTSTRAP_PATH)/driver/sdramc.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
-+
-+dataflash.o: $(BOOTSTRAP_PATH)/driver/dataflash.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
-+
-+nandflash.o: $(BOOTSTRAP_PATH)/driver/nandflash.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
-+
-+crt0_gnu.o: $(BOOTSTRAP_PATH)/crt0_gnu.S
-+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
-+
-+div0.o: $(BOOTSTRAP_PATH)/lib/div0.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
-+
-+string.o: $(BOOTSTRAP_PATH)/lib/string.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
-+
-+udiv.o: $(BOOTSTRAP_PATH)/lib/udiv.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
-+
-+_udivsi3.o: $(BOOTSTRAP_PATH)/lib/_udivsi3.S
-+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
-+
-+_umodsi3.o: $(BOOTSTRAP_PATH)/lib/_umodsi3.S
-+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
-+
-+clean:
-+ $(ERASE_FCT) *.o *.bin *.elf *.map
-diff --git a/board/usb_a9260/nandflash/usb-a9260.h b/board/usb_a9260/nandflash/usb-a9260.h
-new file mode 100644
-index 0000000..2aaf759
---- /dev/null
-+++ b/board/usb_a9260/nandflash/usb-a9260.h
-@@ -0,0 +1,109 @@
-+/* ----------------------------------------------------------------------------
-+ * ATMEL Microcontroller Software Support - ROUSSET -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name : usb-a9260.h
-+ * Object :
-+ * Creation : GH Oct 1th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#ifndef _USB_A9260_H
-+#define _USB_A9260_H
-+
-+/* ******************************************************************* */
-+/* PMC Settings */
-+/* */
-+/* The main oscillator is enabled as soon as possible in the c_startup */
-+/* and MCK is switched on the main oscillator. */
-+/* PLL initialization is done later in the hw_init() function */
-+/* ******************************************************************* */
-+#define MASTER_CLOCK (180000000/2)
-+#define PLL_LOCK_TIMEOUT 1000000
-+
-+#define PLLA_SETTINGS 0x20593F06
-+#define PLLB_SETTINGS 0x10483F0E
-+
-+/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
-+#define MCKR_SETTINGS (AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
-+#define MCKR_CSS_SETTINGS (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
-+
-+/* ******************************************************************* */
-+/* NandFlash Settings */
-+/* */
-+/* ******************************************************************* */
-+#define AT91C_SMARTMEDIA_BASE 0x40000000
-+
-+#define AT91_SMART_MEDIA_ALE (1 << 21) /* our ALE is AD21 */
-+#define AT91_SMART_MEDIA_CLE (1 << 22) /* our CLE is AD22 */
-+
-+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
-+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
-+
-+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
-+
-+
-+/* ******************************************************************** */
-+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000.*/
-+/* Please refer to SMC section in AT91SAM datasheet to learn how */
-+/* to generate these values. */
-+/* ******************************************************************** */
-+#define AT91C_SM_NWE_SETUP (1 << 0)
-+#define AT91C_SM_NCS_WR_SETUP (0 << 8)
-+#define AT91C_SM_NRD_SETUP (1 << 16)
-+#define AT91C_SM_NCS_RD_SETUP (0 << 24)
-+
-+#define AT91C_SM_NWE_PULSE (3 << 0)
-+#define AT91C_SM_NCS_WR_PULSE (3 << 8)
-+#define AT91C_SM_NRD_PULSE (3 << 16)
-+#define AT91C_SM_NCS_RD_PULSE (3 << 24)
-+
-+#define AT91C_SM_NWE_CYCLE (5 << 0)
-+#define AT91C_SM_NRD_CYCLE (5 << 16)
-+#define AT91C_SM_TDF (2 << 16)
-+
-+/* ******************************************************************* */
-+/* BootStrap Settings */
-+/* */
-+/* ******************************************************************* */
-+#define IMG_ADDRESS 0x20000 /* Image Address in NandFlash */
-+#define IMG_SIZE 0x40000 /* Image Size in NandFlash */
-+
-+#define MACH_TYPE 0x6AD /* USB-A9260 */
-+#define JUMP_ADDR 0x23F00000 /* Final Jump Address */
-+
-+/* ******************************************************************* */
-+/* Application Settings */
-+/* ******************************************************************* */
-+#undef CFG_DEBUG
-+#undef CFG_DATAFLASH
-+
-+#define CFG_NANDFLASH
-+#undef NANDFLASH_SMALL_BLOCKS /* NANDFLASH_LARGE_BLOCKS used instead */
-+
-+#define CFG_HW_INIT
-+#define CFG_SDRAM
-+
-+#endif /* _USB_A9260_H */
-diff --git a/board/usb_a9260/usb_a9260.c b/board/usb_a9260/usb_a9260.c
-new file mode 100644
-index 0000000..de30f0b
---- /dev/null
-+++ b/board/usb_a9260/usb_a9260.c
-@@ -0,0 +1,298 @@
-+/* ----------------------------------------------------------------------------
-+ * ATMEL Microcontroller Software Support - ROUSSET -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaiimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name : usb_a9260.c
-+ * Object :
-+ * Creation : GH Oct 1th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#include "../../include/part.h"
-+#include "../../include/gpio.h"
-+#include "../../include/pmc.h"
-+#include "../../include/debug.h"
-+#include "../../include/sdramc.h"
-+#include "../../include/main.h"
-+#ifdef CFG_NANDFLASH
-+#include "../../include/nandflash.h"
-+#endif
-+#ifdef CFG_DATAFLASH
-+#include "../../include/dataflash.h"
-+#endif
-+
-+static inline unsigned int get_cp15(void)
-+{
-+ unsigned int value;
-+ __asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
-+ return value;
-+}
-+
-+static inline void set_cp15(unsigned int value)
-+{
-+ __asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
-+}
-+
-+#ifdef CFG_HW_INIT
-+/*----------------------------------------------------------------------------*/
-+/* \fn hw_init */
-+/* \brief This function performs very low level HW initialization */
-+/* This function is invoked as soon as possible during the c_startup */
-+/* The bss segment must be initialized */
-+/*----------------------------------------------------------------------------*/
-+void hw_init(void)
-+{
-+ unsigned int cp15;
-+
-+ /* Configure PIOs */
-+ const struct pio_desc hw_pio[] = {
-+#ifdef CFG_DEBUG
-+ {"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Disable watchdog */
-+ writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
-+
-+ /* At this stage the main oscillator is supposed to be enabled
-+ * PCK = MCK = MOSC */
-+
-+ /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
-+ pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+ /* PCK = PLLA = 2 * MCK */
-+ pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
-+ /* Switch MCK on PLLA output */
-+ pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+ /* Configure PLLB */
-+ pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+ /* Configure CP15 */
-+ cp15 = get_cp15();
-+ cp15 |= I_CACHE;
-+ set_cp15(cp15);
-+
-+ /* Configure the PIO controller */
-+ pio_setup(hw_pio);
-+
-+ /* Configure the EBI Slave Slot Cycle to 64 */
-+ writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
-+
-+#ifdef CFG_DEBUG
-+ /* Enable Debug messages on the DBGU */
-+ dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
-+
-+ dbg_print("Start AT91Bootstrap...\n\r");
-+#endif /* CFG_DEBUG */
-+
-+#ifdef CFG_SDRAM
-+ /* Initialize the matrix */
-+ writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBICSA);
-+
-+ /* Configure SDRAM Controller */
-+ sdram_init( AT91C_SDRAMC_NC_9 |
-+ AT91C_SDRAMC_NR_13 |
-+ AT91C_SDRAMC_CAS_2 |
-+ AT91C_SDRAMC_NB_4_BANKS |
-+ AT91C_SDRAMC_DBW_32_BITS |
-+ AT91C_SDRAMC_TWR_2 |
-+ AT91C_SDRAMC_TRC_7 |
-+ AT91C_SDRAMC_TRP_2 |
-+ AT91C_SDRAMC_TRCD_2 |
-+ AT91C_SDRAMC_TRAS_5 |
-+ AT91C_SDRAMC_TXSR_8, /* Control Register */
-+ (MASTER_CLOCK * 7)/1000000, /* Refresh Timer Register */
-+ AT91C_SDRAMC_MD_SDRAM); /* SDRAM (no low power) */
-+
-+
-+#endif /* CFG_SDRAM */
-+}
-+#endif /* CFG_HW_INIT */
-+
-+#ifdef CFG_SDRAM
-+/*------------------------------------------------------------------------------*/
-+/* \fn sdramc_hw_init */
-+/* \brief This function performs SDRAMC HW initialization */
-+/*------------------------------------------------------------------------------*/
-+void sdramc_hw_init(void)
-+{
-+ /* Configure PIOs */
-+/* const struct pio_desc sdramc_pio[] = {
-+ {"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+*/
-+ /* Configure the SDRAMC PIO controller to output PCK0 */
-+/* pio_setup(sdramc_pio); */
-+
-+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
-+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
-+
-+}
-+#endif /* CFG_SDRAM */
-+
-+#ifdef CFG_DATAFLASH
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn df_recovery */
-+/* \brief This function erases DataFlash Page 0 if USR PB is pressed */
-+/* during boot sequence */
-+/*------------------------------------------------------------------------------*/
-+void df_recovery(AT91PS_DF pDf)
-+{
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
-+ /* Configure PIOs */
-+ const struct pio_desc usrpb_pio[] = {
-+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Configure the PIO controller */
-+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+ pio_setup(usrpb_pio);
-+
-+ /* If USR PB is pressed during Boot sequence */
-+ /* Erase DataFlash Page 0*/
-+ if ( !pio_get_value(AT91C_PIN_PB(10)) )
-+ df_page_erase(pDf, 0);
-+#endif
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn df_hw_init */
-+/* \brief This function performs DataFlash HW initialization */
-+/*------------------------------------------------------------------------------*/
-+void df_hw_init(void)
-+{
-+ /* Configure PIOs */
-+ const struct pio_desc df_pio[] = {
-+ {"MISO", AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"MOSI", AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"SPCK", AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
-+ {"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Configure the PIO controller */
-+ pio_setup(df_pio);
-+}
-+#endif /* CFG_DATAFLASH */
-+
-+
-+
-+#ifdef CFG_NANDFLASH
-+/*------------------------------------------------------------------------------*/
-+/* \fn nand_recovery */
-+/* \brief This function erases NandFlash Block 0 if USR PB is pressed */
-+/* during boot sequence */
-+/*------------------------------------------------------------------------------*/
-+static void nand_recovery(void)
-+{
-+ /* Configure PIOs */
-+ const struct pio_desc usrpb_pio[] = {
-+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Configure the PIO controller */
-+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+ pio_setup(usrpb_pio);
-+
-+ /* If USR PB is pressed during Boot sequence */
-+ /* Erase NandFlash block 0*/
-+ if (!pio_get_value(AT91C_PIN_PB(10)) )
-+ AT91F_NandEraseBlock0();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn nandflash_hw_init */
-+/* \brief NandFlash HW init */
-+/*------------------------------------------------------------------------------*/
-+void nandflash_hw_init(void)
-+{
-+ /* Configure PIOs */
-+ const struct pio_desc nand_pio[] = {
-+ {"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
-+ {"NANDCS", AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
-+ writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
-+
-+ /* Configure SMC CS3 */
-+ writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
-+ writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
-+ writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE) , AT91C_BASE_SMC + SMC_CYCLE3);
-+ writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE |
-+ AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF) , AT91C_BASE_SMC + SMC_CTRL3);
-+
-+ /* Configure the PIO controller */
-+ writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
-+ pio_setup(nand_pio);
-+
-+ nand_recovery();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn nandflash_cfg_16bits_dbw_init */
-+/* \brief Configure SMC in 16 bits mode */
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_16bits_dbw_init(void)
-+{
-+ writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn nandflash_cfg_8bits_dbw_init */
-+/* \brief Configure SMC in 8 bits mode */
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_8bits_dbw_init(void)
-+{
-+ writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+
-+#endif /* #ifdef CFG_NANDFLASH */
-diff --git a/crt0_gnu.S b/crt0_gnu.S
-index 042b617..002feef 100644
---- a/crt0_gnu.S
-+++ b/crt0_gnu.S
-@@ -106,6 +106,13 @@ _relocate_to_sram:
- #endif /* CFG_NORFLASH */
-
- _setup_clocks:
-+/* Test if main osc is bypassed */
-+ ldr r0,=AT91C_PMC_MOR
-+ ldr r1, [r0]
-+ ldr r2,=AT91C_CKGR_OSCBYPASS
-+ ands r1, r1, r2
-+ bne _init_data /* branch if OSCBYPASS=1 */
-+
- /* Test if main oscillator is enabled */
- ldr r0,=AT91C_PMC_SR
- ldr r1, [r0]
-diff --git a/include/part.h b/include/part.h
-index ba5985a..212789f 100644
---- a/include/part.h
-+++ b/include/part.h
-@@ -35,7 +35,11 @@
-
- #ifdef AT91SAM9260
- #include "AT91SAM9260_inc.h"
--#include "at91sam9260ek.h"
-+ #ifdef at91sam9260ek
-+ #include "at91sam9260ek.h"
-+ #elif usb_a9260
-+ #include "usb-a9260.h"
-+ #endif
- #endif
-
- #ifdef AT91SAM9XE
---
-1.7.9.5
-
+++ /dev/null
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9260=y
-CONFIG_MACH_USB_A9260=y
-CONFIG_AT91_SLOW_CLOCK=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=64M console=ttyS0,115200"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_EXT2_FS=y
-CONFIG_FUSE_FS=m
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
+++ /dev/null
-From 74796655212d321f50ab89e8c5570245901f4cba Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Thu, 5 Jul 2012 18:44:07 +0200
-Subject: [PATCH] Add support for the Calao-systems USB-A9263
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
----
- board/usb_a9263/dataflash/Makefile | 115 +++++++++++++
- board/usb_a9263/dataflash/usb-a9263.h | 97 +++++++++++
- board/usb_a9263/nandflash/Makefile | 117 ++++++++++++++
- board/usb_a9263/nandflash/usb-a9263.h | 116 +++++++++++++
- board/usb_a9263/usb_a9263.c | 285 +++++++++++++++++++++++++++++++++
- crt0_gnu.S | 7 +
- driver/dataflash.c | 6 +-
- include/part.h | 6 +-
- 8 files changed, 745 insertions(+), 4 deletions(-)
- create mode 100644 board/usb_a9263/dataflash/Makefile
- create mode 100644 board/usb_a9263/dataflash/usb-a9263.h
- create mode 100644 board/usb_a9263/nandflash/Makefile
- create mode 100644 board/usb_a9263/nandflash/usb-a9263.h
- create mode 100644 board/usb_a9263/usb_a9263.c
-
-diff --git a/board/usb_a9263/dataflash/Makefile b/board/usb_a9263/dataflash/Makefile
-new file mode 100644
-index 0000000..332685e
---- /dev/null
-+++ b/board/usb_a9263/dataflash/Makefile
-@@ -0,0 +1,115 @@
-+# TODO: set this appropriately for your local toolchain
-+#SHELL=C:\CYGWIN_REP\dwn_071004\bin\BASH.exe
-+CROSS_COMPILE=arm-elf-
-+#CROSS_COMPILE = arm-softfloat-linux-gnu-
-+
-+TOOLCHAIN=gcc
-+
-+BOOTSTRAP_PATH=../../..
-+
-+# DataFlashBoot Configuration for USB-A9263
-+
-+# Target name (case sensitive!!!)
-+TARGET=AT91SAM9263
-+# Board name (case sensitive!!!)
-+BOARD=usb_a9263
-+# Link Address and Top_of_Memory
-+LINK_ADDR=0x300000
-+TOP_OF_MEMORY=0x314000
-+# Name of current directory
-+PROJECT=dataflash
-+
-+ifndef BOOT_NAME
-+BOOT_NAME=$(PROJECT)_$(BOARD)
-+endif
-+
-+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+
-+AS=$(CROSS_COMPILE)gcc
-+CC=$(CROSS_COMPILE)gcc
-+LD=$(CROSS_COMPILE)gcc
-+NM= $(CROSS_COMPILE)nm
-+SIZE=$(CROSS_COMPILE)size
-+OBJCOPY=$(CROSS_COMPILE)objcopy
-+OBJDUMP=$(CROSS_COMPILE)objdump
-+CCFLAGS=-g -mcpu=arm9 -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
-+ASFLAGS=-g -mcpu=arm9 -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
-+
-+# Linker flags.
-+# -Wl,...: tell GCC to pass this to linker.
-+# -Map: create map file
-+# --cref: add cross reference to map file
-+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
-+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
-+OBJS=crt0_gnu.o
-+
-+endif
-+
-+OBJS+=\
-+ $(BOARD).o \
-+ main.o \
-+ gpio.o \
-+ pmc.o \
-+ debug.o \
-+ sdramc.o \
-+ dataflash.o \
-+ _udivsi3.o \
-+ _umodsi3.o \
-+ div0.o \
-+ udiv.o \
-+ string.o
-+
-+rebuild: clean all
-+
-+all: $(BOOT_NAME)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+$(BOOT_NAME): $(OBJS)
-+ $(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
-+ $(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
-+endif
-+
-+
-+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
-+
-+main.o: $(BOOTSTRAP_PATH)/main.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
-+
-+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
-+
-+pmc.o: $(BOOTSTRAP_PATH)/driver/pmc.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
-+
-+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
-+
-+sdramc.o: $(BOOTSTRAP_PATH)/driver/sdramc.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
-+
-+dataflash.o: $(BOOTSTRAP_PATH)/driver/dataflash.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
-+
-+crt0_gnu.o: $(BOOTSTRAP_PATH)/crt0_gnu.S
-+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
-+
-+div0.o: $(BOOTSTRAP_PATH)/lib/div0.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
-+
-+string.o: $(BOOTSTRAP_PATH)/lib/string.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
-+
-+udiv.o: $(BOOTSTRAP_PATH)/lib/udiv.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
-+
-+_udivsi3.o: $(BOOTSTRAP_PATH)/lib/_udivsi3.S
-+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
-+
-+_umodsi3.o: $(BOOTSTRAP_PATH)/lib/_umodsi3.S
-+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
-+
-+clean:
-+ rm -f *.o *.bin *.elf *.map
-diff --git a/board/usb_a9263/dataflash/usb-a9263.h b/board/usb_a9263/dataflash/usb-a9263.h
-new file mode 100644
-index 0000000..40a3af8
---- /dev/null
-+++ b/board/usb_a9263/dataflash/usb-a9263.h
-@@ -0,0 +1,97 @@
-+/* ----------------------------------------------------------------------------
-+ * ATMEL Microcontroller Software Support - ROUSSET -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name : usb-a9263.h
-+ * Object :
-+ * Creation : GH Jun 28th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#ifndef _USB_A9263_H
-+#define _USB_A9263_H
-+
-+/* ******************************************************************* */
-+/* PMC Settings */
-+/* */
-+/* The main oscillator is enabled as soon as possible in the c_startup */
-+/* and MCK is switched on the main oscillator. */
-+/* PLL initialization is done later in the hw_init() function */
-+/* ******************************************************************* */
-+#define MASTER_CLOCK (180000000/2)
-+#define PLL_LOCK_TIMEOUT 1000000
-+
-+#define PLLA_SETTINGS 0x20593F06
-+#define PLLB_SETTINGS 0x10483F0E
-+
-+/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
-+#define MCKR_SETTINGS (AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
-+#define MCKR_CSS_SETTINGS (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
-+
-+/* ******************************************************************* */
-+/* DataFlash Settings */
-+/* */
-+/* ******************************************************************* */
-+#define AT91C_BASE_SPI AT91C_BASE_SPI0
-+#define AT91C_ID_SPI AT91C_ID_SPI0
-+
-+/* SPI CLOCK */
-+#define AT91C_SPI_CLK 8000000
-+/* AC characteristics */
-+/* DLYBS = tCSS= 250ns min and DLYBCT = tCSH = 250ns */
-+#define DATAFLASH_TCSS (0x1a << 16) /* 250ns min (tCSS) <=> 12/48000000 = 250ns */
-+#define DATAFLASH_TCHS (0x1 << 24) /* 250ns min (tCSH) <=> (64*1+SCBR)/(2*48000000) */
-+
-+#define DF_CS_SETTINGS (AT91C_SPI_NCPHA | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT & DATAFLASH_TCHS) | ((MASTER_CLOCK / AT91C_SPI_CLK) << 8))
-+
-+/* ******************************************************************* */
-+/* SDRAMC Settings */
-+/* */
-+/* ******************************************************************* */
-+#define AT91C_BASE_SDRAMC AT91C_BASE_SDRAMC0
-+#define AT91C_EBI_SDRAM AT91C_EBI0_SDRAM
-+
-+/* ******************************************************************* */
-+/* BootStrap Settings */
-+/* */
-+/* ******************************************************************* */
-+#define AT91C_SPI_PCS_DATAFLASH AT91C_SPI_PCS0_DATAFLASH /* Boot on SPI NCS0 */
-+
-+#define IMG_ADDRESS 0x4000 /* Image Address in DataFlash */
-+#define IMG_SIZE 0x40000 /* Image Size in DataFlash */
-+
-+#define MACH_TYPE 0x6AE /* USB-A9263 */
-+#define JUMP_ADDR 0x23F00000 /* Final Jump Address */
-+
-+/* ******************************************************************* */
-+/* Application Settings */
-+/* ******************************************************************* */
-+#define CFG_HW_INIT
-+#define CFG_SDRAM
-+#undef CFG_DEBUG
-+
-+#define CFG_DATAFLASH
-+
-+#endif /* _USB_A9263_H */
-diff --git a/board/usb_a9263/nandflash/Makefile b/board/usb_a9263/nandflash/Makefile
-new file mode 100644
-index 0000000..c453098
---- /dev/null
-+++ b/board/usb_a9263/nandflash/Makefile
-@@ -0,0 +1,117 @@
-+# TODO: set this appropriately for your local toolchain
-+#SHELL=C:\CYGWIN_REP\dwn_071004\bin\BASH.exe
-+CROSS_COMPILE=arm-elf-
-+
-+TOOLCHAIN=gcc
-+
-+BOOTSTRAP_PATH=../../..
-+
-+# NandFlashBoot Configuration for USB-A9263
-+
-+# Target name (case sensitive!!!)
-+TARGET=AT91SAM9263
-+# Board name (case sensitive!!!)
-+BOARD=usb_a9263
-+# Link Address and Top_of_Memory
-+LINK_ADDR=0x300000
-+TOP_OF_MEMORY=0x314000
-+# Name of current directory
-+PROJECT=nandflash
-+
-+ifndef BOOT_NAME
-+BOOT_NAME=$(PROJECT)_$(BOARD)
-+endif
-+
-+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+
-+AS=$(CROSS_COMPILE)gcc
-+CC=$(CROSS_COMPILE)gcc
-+LD=$(CROSS_COMPILE)gcc
-+NM= $(CROSS_COMPILE)nm
-+SIZE=$(CROSS_COMPILE)size
-+OBJCOPY=$(CROSS_COMPILE)objcopy
-+OBJDUMP=$(CROSS_COMPILE)objdump
-+CCFLAGS=-g -mcpu=arm9 -O0 -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
-+ASFLAGS=-g -mcpu=arm9 -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
-+
-+# Linker flags.
-+# -Wl,...: tell GCC to pass this to linker.
-+# -Map: create map file
-+# --cref: add cross reference to map file
-+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
-+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
-+OBJS=crt0_gnu.o
-+
-+endif
-+
-+OBJS+=\
-+ $(BOARD).o \
-+ main.o \
-+ gpio.o \
-+ pmc.o \
-+ debug.o \
-+ sdramc.o \
-+ nandflash.o \
-+ _udivsi3.o \
-+ _umodsi3.o \
-+ div0.o \
-+ udiv.o \
-+ string.o
-+
-+rebuild: clean all
-+
-+all: $(BOOT_NAME)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+$(BOOT_NAME): $(OBJS)
-+ $(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
-+ $(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
-+endif
-+
-+
-+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
-+
-+main.o: $(BOOTSTRAP_PATH)/main.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
-+
-+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
-+
-+pmc.o: $(BOOTSTRAP_PATH)/driver/pmc.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
-+
-+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
-+
-+sdramc.o: $(BOOTSTRAP_PATH)/driver/sdramc.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
-+
-+dataflash.o: $(BOOTSTRAP_PATH)/driver/dataflash.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
-+
-+nandflash.o: $(BOOTSTRAP_PATH)/driver/nandflash.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
-+
-+crt0_gnu.o: $(BOOTSTRAP_PATH)/crt0_gnu.S
-+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
-+
-+div0.o: $(BOOTSTRAP_PATH)/lib/div0.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
-+
-+string.o: $(BOOTSTRAP_PATH)/lib/string.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
-+
-+udiv.o: $(BOOTSTRAP_PATH)/lib/udiv.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
-+
-+_udivsi3.o: $(BOOTSTRAP_PATH)/lib/_udivsi3.S
-+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
-+
-+_umodsi3.o: $(BOOTSTRAP_PATH)/lib/_umodsi3.S
-+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
-+
-+clean:
-+ rm -f *.o *.bin *.elf *.map
-diff --git a/board/usb_a9263/nandflash/usb-a9263.h b/board/usb_a9263/nandflash/usb-a9263.h
-new file mode 100644
-index 0000000..24e2cf1
---- /dev/null
-+++ b/board/usb_a9263/nandflash/usb-a9263.h
-@@ -0,0 +1,116 @@
-+/* ----------------------------------------------------------------------------
-+ * ATMEL Microcontroller Software Support - ROUSSET -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name : usb-a9263.h
-+ * Object :
-+ * Creation : GH Jun 28th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#ifndef _USB_A9263_H
-+#define _USB_A9263_H
-+
-+/* ******************************************************************* */
-+/* PMC Settings */
-+/* */
-+/* The main oscillator is enabled as soon as possible in the c_startup */
-+/* and MCK is switched on the main oscillator. */
-+/* PLL initialization is done later in the hw_init() function */
-+/* ******************************************************************* */
-+#define MASTER_CLOCK (180000000/2)
-+#define PLL_LOCK_TIMEOUT 1000000
-+
-+#define PLLA_SETTINGS 0x20593F06
-+#define PLLB_SETTINGS 0x10483F0E
-+
-+/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
-+#define MCKR_SETTINGS (AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
-+#define MCKR_CSS_SETTINGS (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
-+
-+/* ******************************************************************* */
-+/* NandFlash Settings */
-+/* */
-+/* ******************************************************************* */
-+#define AT91C_SMARTMEDIA_BASE 0x40000000
-+
-+#define AT91_SMART_MEDIA_ALE (1 << 21) /* our ALE is AD21 */
-+#define AT91_SMART_MEDIA_CLE (1 << 22) /* our CLE is AD22 */
-+
-+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOD_SODR = AT91C_PIO_PD15;} while(0)
-+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOD_CODR = AT91C_PIO_PD15;} while(0)
-+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOA_PDSR & AT91C_PIO_PA22))
-+
-+/* ******************************************************************* */
-+/* SDRAMC Settings */
-+/* */
-+/* ******************************************************************* */
-+#define AT91C_BASE_SDRAMC AT91C_BASE_SDRAMC0
-+#define AT91C_EBI_SDRAM AT91C_EBI0_SDRAM
-+
-+/* ******************************************************************** */
-+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000. */
-+/* Please refer to SMC section in AT91SAM9x datasheet to learn how */
-+/* to generate these values. */
-+/* ******************************************************************** */
-+#define AT91C_SM_NWE_SETUP (1 << 0)
-+#define AT91C_SM_NCS_WR_SETUP (0 << 8)
-+#define AT91C_SM_NRD_SETUP (1 << 16)
-+#define AT91C_SM_NCS_RD_SETUP (0 << 24)
-+
-+#define AT91C_SM_NWE_PULSE (3 << 0)
-+#define AT91C_SM_NCS_WR_PULSE (3 << 8)
-+#define AT91C_SM_NRD_PULSE (3 << 16)
-+#define AT91C_SM_NCS_RD_PULSE (3 << 24)
-+
-+#define AT91C_SM_NWE_CYCLE (5 << 0)
-+#define AT91C_SM_NRD_CYCLE (5 << 16)
-+
-+#define AT91C_SM_TDF (2 << 16)
-+
-+/* ******************************************************************* */
-+/* BootStrap Settings */
-+/* */
-+/* ******************************************************************* */
-+#define IMG_ADDRESS 0x20000 /* Image Address in NandFlash */
-+#define IMG_SIZE 0x40000 /* Image Size in NandFlash */
-+
-+#define MACH_TYPE 0x6AE /* USB-A9263 */
-+#define JUMP_ADDR 0x23F00000 /* Final Jump Address */
-+
-+/* ******************************************************************* */
-+/* Application Settings */
-+/* ******************************************************************* */
-+#undef CFG_DEBUG
-+#undef CFG_DATAFLASH
-+
-+#define CFG_NANDFLASH
-+#undef NANDFLASH_SMALL_BLOCKS /* NANDFLASH_LARGE_BLOCKS used instead */
-+
-+#define CFG_HW_INIT
-+#define CFG_SDRAM
-+
-+
-+#endif /* _USB_A9263_H */
-diff --git a/board/usb_a9263/usb_a9263.c b/board/usb_a9263/usb_a9263.c
-new file mode 100644
-index 0000000..5630f99
---- /dev/null
-+++ b/board/usb_a9263/usb_a9263.c
-@@ -0,0 +1,285 @@
-+/* ----------------------------------------------------------------------------
-+ * ATMEL Microcontroller Software Support - ROUSSET -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaiimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name : usb_a9263.c
-+ * Object :
-+ * Creation : GH Jun 28th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#include "../../include/part.h"
-+#include "../../include/gpio.h"
-+#include "../../include/pmc.h"
-+#include "../../include/debug.h"
-+#include "../../include/sdramc.h"
-+#include "../../include/main.h"
-+#ifdef CFG_NANDFLASH
-+#include "../../include/nandflash.h"
-+#endif
-+#ifdef CFG_DATAFLASH
-+#include "../../include/dataflash.h"
-+#endif
-+
-+static inline unsigned int get_cp15(void)
-+{
-+ unsigned int value;
-+ __asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
-+ return value;
-+}
-+
-+static inline void set_cp15(unsigned int value)
-+{
-+ __asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
-+}
-+
-+
-+#ifdef CFG_HW_INIT
-+/*---------------------------------------------------------------------------- */
-+/* \fn hw_init */
-+/* \brief This function performs very low level HW initialization */
-+/* This function is invoked as soon as possible during the c_startup */
-+/* The bss segment must be initialized */
-+/*---------------------------------------------------------------------------- */
-+void hw_init(void)
-+{
-+ /* Configure PIOs */
-+ const struct pio_desc hw_pio[] = {
-+#ifdef CFG_DEBUG
-+ {"RXD", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"TXD", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Disable watchdog */
-+ writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
-+
-+ /* At this stage the main oscillator is supposed to be enabled
-+ * PCK = MCK = MOSC */
-+
-+ /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
-+ pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+ /* PCK = PLLA = 2 * MCK */
-+ pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
-+ /* Switch MCK on PLLA output */
-+ pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+
-+ /* Configure PLLB */
-+ pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+ /* Configure the PIO controller to output PCK0 */
-+ pio_setup(hw_pio);
-+
-+ /* Configure the EBI0 Slave Slot Cycle to 64 */
-+ writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG4)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG4));
-+
-+#ifdef CFG_DEBUG
-+ /* Enable Debug messages on the DBGU */
-+ dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
-+ dbg_print("Start AT91Bootstrap...\n\r");
-+#endif /* CFG_DEBUG */
-+
-+#ifdef CFG_SDRAM
-+ /* Initialize the matrix */
-+ /* VDDIOMSEL = 1 -> Memories are 3.3V powered */
-+ writel(readl(AT91C_BASE_CCFG + CCFG_EBI0CSA) | (1 << 16) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBI0CSA);
-+
-+ /* Configure SDRAM Controller */
-+ sdram_init( AT91C_SDRAMC_NC_9 |
-+ AT91C_SDRAMC_NR_13 |
-+ AT91C_SDRAMC_CAS_2 |
-+ AT91C_SDRAMC_NB_4_BANKS |
-+ AT91C_SDRAMC_DBW_32_BITS |
-+ AT91C_SDRAMC_TWR_2 |
-+ AT91C_SDRAMC_TRC_7 |
-+ AT91C_SDRAMC_TRP_2 |
-+ AT91C_SDRAMC_TRCD_2 |
-+ AT91C_SDRAMC_TRAS_5 |
-+ AT91C_SDRAMC_TXSR_8, /* Control Register */
-+ (MASTER_CLOCK * 7)/1000000, /* Refresh Timer Register */
-+ AT91C_SDRAMC_MD_SDRAM); /* SDRAM (no low power) */
-+#endif /* CFG_SDRAM */
-+}
-+#endif /* CFG_HW_INIT */
-+
-+
-+#ifdef CFG_SDRAM
-+//*----------------------------------------------------------------------------
-+//* \fn sdramc_hw_init
-+//* \brief This function performs SDRAMC HW initialization
-+//*----------------------------------------------------------------------------*/
-+void sdramc_hw_init(void)
-+{
-+ /* Configure PIOs */
-+ const struct pio_desc sdramc_pio[] = {
-+ {"D16", AT91C_PIN_PD(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D17", AT91C_PIN_PD(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D18", AT91C_PIN_PD(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D19", AT91C_PIN_PD(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D20", AT91C_PIN_PD(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D21", AT91C_PIN_PD(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D22", AT91C_PIN_PD(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D23", AT91C_PIN_PD(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D24", AT91C_PIN_PD(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D25", AT91C_PIN_PD(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D26", AT91C_PIN_PD(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D27", AT91C_PIN_PD(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D28", AT91C_PIN_PD(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D29", AT91C_PIN_PD(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D30", AT91C_PIN_PD(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D31", AT91C_PIN_PD(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Configure the SDRAMC PIO controller */
-+ pio_setup(sdramc_pio);
-+}
-+#endif
-+
-+#ifdef CFG_DATAFLASH
-+/*------------------------------------------------------------------------------*/
-+/* \fn df_recovery */
-+/* \brief This function erases DataFlash Page 0 if USER PB is pressed */
-+/* during boot sequence */
-+/*------------------------------------------------------------------------------*/
-+void df_recovery(AT91PS_DF pDf)
-+{
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
-+ /* Configure PIOs */
-+ const struct pio_desc usrpb_pio[] = {
-+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Configure the PIO controller */
-+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+ pio_setup(usrpb_pio);
-+
-+ /* If USER PB is pressed during Boot sequence */
-+ /* Erase NandFlash block 0*/
-+ if ( !pio_get_value(AT91C_PIN_PB(10)) )
-+ df_page_erase(pDf, 0);
-+#endif
-+}
-+/*------------------------------------------------------------------------------*/
-+/* \fn df_hw_init */
-+/* \brief This function performs DataFlash HW initialization */
-+/*------------------------------------------------------------------------------*/
-+void df_hw_init(void)
-+{
-+ /* Configure PIOs */
-+ const struct pio_desc df_pio[] = {
-+ {"MISO", AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_B},
-+ {"MOSI", AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_B},
-+ {"SPCK", AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_B},
-+ {"NPCS0", AT91C_PIN_PA(5), 0, PIO_DEFAULT, PIO_PERIPH_B},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Configure the PIO controller */
-+ pio_setup(df_pio);
-+}
-+#endif /* CFG_DATAFLASH */
-+
-+
-+#ifdef CFG_NANDFLASH
-+/*------------------------------------------------------------------------------*/
-+/* \fn nand_recovery */
-+/* \brief This function erases NandFlash Block 0 if USER PB is pressed */
-+/* during boot sequence */
-+/*------------------------------------------------------------------------------*/
-+static void nand_recovery(void)
-+{
-+ /* Configure PIOs */
-+ const struct pio_desc usrpb_pio[] = {
-+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Configure the PIO controller */
-+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+ pio_setup(usrpb_pio);
-+
-+ /* If USER PB is pressed during Boot sequence */
-+ /* Erase NandFlash block 0*/
-+ if (!pio_get_value(AT91C_PIN_PB(10)) )
-+ AT91F_NandEraseBlock0();
-+}
-+/*------------------------------------------------------------------------------*/
-+/* \fn nandflash_hw_init */
-+/* \brief NandFlash HW init */
-+/*------------------------------------------------------------------------------*/
-+void nandflash_hw_init(void)
-+{
-+ /* Configure PIOs */
-+ const struct pio_desc nand_pio[] = {
-+ {"RDY_BSY", AT91C_PIN_PA(22), 0, PIO_PULLUP, PIO_INPUT},
-+ {"NANDCS", AT91C_PIN_PD(15), 0, PIO_PULLUP, PIO_OUTPUT},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
-+ writel(readl(AT91C_BASE_CCFG + CCFG_EBI0CSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBI0CSA);
-+
-+ /* Configure SMC CS3 */
-+ writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC0 + SMC_SETUP3);
-+ writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC0 + SMC_PULSE3);
-+ writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE) , AT91C_BASE_SMC0 + SMC_CYCLE3);
-+ writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE |
-+ AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF) , AT91C_BASE_SMC0 + SMC_CTRL3);
-+
-+ /* Configure the PIO controller */
-+ writel((1 << AT91C_ID_PIOA), PMC_PCER + AT91C_BASE_PMC);
-+ writel((1 << AT91C_ID_PIOCDE), PMC_PCER + AT91C_BASE_PMC);
-+
-+ pio_setup(nand_pio);
-+
-+ nand_recovery();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn nandflash_cfg_16bits_dbw_init */
-+/* \brief Configure SMC in 16 bits mode */
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_16bits_dbw_init(void)
-+{
-+ writel(readl(AT91C_BASE_SMC0 + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC0 + SMC_CTRL3);
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn nandflash_cfg_8bits_dbw_init */
-+/* \brief Configure SMC in 8 bits mode */
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_8bits_dbw_init(void)
-+{
-+ writel((readl(AT91C_BASE_SMC0 + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC0 + SMC_CTRL3);
-+}
-+
-+#endif /* #ifdef CFG_NANDFLASH */
-+
-+
-diff --git a/crt0_gnu.S b/crt0_gnu.S
-index 042b617..002feef 100644
---- a/crt0_gnu.S
-+++ b/crt0_gnu.S
-@@ -106,6 +106,13 @@ _relocate_to_sram:
- #endif /* CFG_NORFLASH */
-
- _setup_clocks:
-+/* Test if main osc is bypassed */
-+ ldr r0,=AT91C_PMC_MOR
-+ ldr r1, [r0]
-+ ldr r2,=AT91C_CKGR_OSCBYPASS
-+ ands r1, r1, r2
-+ bne _init_data /* branch if OSCBYPASS=1 */
-+
- /* Test if main oscillator is enabled */
- ldr r0,=AT91C_PMC_SR
- ldr r1, [r0]
-diff --git a/driver/dataflash.c b/driver/dataflash.c
-index e28e49e..4de295a 100644
---- a/driver/dataflash.c
-+++ b/driver/dataflash.c
-@@ -293,14 +293,14 @@ static int df_init (AT91PS_DF pDf)
- pDf->dfDescription.pages_size = 264;
- pDf->dfDescription.page_offset = 9;
- break;
--
-+*/
- case AT45DB021B:
- pDf->dfDescription.pages_number = 1024;
- pDf->dfDescription.pages_size = 264;
- pDf->dfDescription.page_offset = 9;
- break;
-
-- case AT45DB041B:
-+/* case AT45DB041B:
- pDf->dfDescription.pages_number = 2048;
- pDf->dfDescription.pages_size = 264;
- pDf->dfDescription.page_offset = 9;
-@@ -373,7 +373,7 @@ int load_df(unsigned int pcs, unsigned int img_addr, unsigned int img_size, unsi
- if (!df_init(pDf))
- return -1;
-
--#if defined(AT91SAM9260) || defined(AT91SAM9XE) || defined(AT91SAM9G20)
-+#if defined(AT91SAM9260) || defined(AT91SAM9263) || defined(AT91SAM9XE) || defined(AT91SAM9G20)
- /* Test if a button has been pressed or not */
- /* Erase Page 0 to avoid infinite loop */
- df_recovery(pDf);
-diff --git a/include/part.h b/include/part.h
-index ba5985a..a1863d0 100644
---- a/include/part.h
-+++ b/include/part.h
-@@ -61,7 +61,11 @@
-
- #ifdef AT91SAM9263
- #include "AT91SAM9263_inc.h"
--#include "at91sam9263ek.h"
-+ #ifdef at91sam9263ek
-+ #include "at91sam9263ek.h"
-+ #elif usb_a9263
-+ #include "usb-a9263.h"
-+ #endif
- #endif
-
- #ifdef AT91CAP9
---
-1.5.6.3
-
+++ /dev/null
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9263=y
-CONFIG_MACH_USB_A9263=y
-CONFIG_AT91_SLOW_CLOCK=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=64M console=ttyS0,115200"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_EXT2_FS=y
-CONFIG_FUSE_FS=m
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_UBIFS_FS_XATTR=y
-CONFIG_UBIFS_FS_ADVANCED_COMPR=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
+++ /dev/null
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9G20=y
-CONFIG_MACH_USB_A9G20=y
-CONFIG_AT91_SLOW_CLOCK=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=64M console=ttyS0,115200"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_GPIO=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_RV3029C2=y
-CONFIG_EXT2_FS=y
-CONFIG_FUSE_FS=m
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_UBIFS_FS_XATTR=y
-CONFIG_UBIFS_FS_ADVANCED_COMPR=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
+++ /dev/null
-From 8d84757d5170969e8bdfebc7951f43c5aa2b05fd Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Fri, 6 Jul 2012 16:32:47 +0200
-Subject: [PATCH] Add support for the Calao-systems USB-A9G20-LPW
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
----
- board/usb_a9g20_lpw/nandflash/Makefile | 121 ++++++++++
- board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h | 112 +++++++++
- board/usb_a9g20_lpw/usb_a9g20_lpw.c | 303 +++++++++++++++++++++++++
- crt0_gnu.S | 7 +
- include/part.h | 6 +-
- 5 files changed, 548 insertions(+), 1 deletions(-)
- create mode 100644 board/usb_a9g20_lpw/nandflash/Makefile
- create mode 100644 board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h
- create mode 100644 board/usb_a9g20_lpw/usb_a9g20_lpw.c
-
-diff --git a/board/usb_a9g20_lpw/nandflash/Makefile b/board/usb_a9g20_lpw/nandflash/Makefile
-new file mode 100644
-index 0000000..8c9d99a
---- /dev/null
-+++ b/board/usb_a9g20_lpw/nandflash/Makefile
-@@ -0,0 +1,121 @@
-+# TODO: set this appropriately for your local toolchain
-+ifndef ERASE_FCT
-+ERASE_FCT=rm -f
-+endif
-+ifndef CROSS_COMPILE
-+CROSS_COMPILE=arm-elf-
-+endif
-+
-+TOOLCHAIN=gcc
-+
-+BOOTSTRAP_PATH=../../..
-+
-+# NandFlashBoot Configuration for USB-A9G20-LPW
-+
-+# Target name (case sensitive!!!)
-+TARGET=AT91SAM9G20
-+# Board name (case sensitive!!!)
-+BOARD=usb_a9g20_lpw
-+# Link Address and Top_of_Memory
-+LINK_ADDR=0x200000
-+TOP_OF_MEMORY=0x301000
-+# Name of current directory
-+PROJECT=nandflash
-+
-+ifndef BOOT_NAME
-+BOOT_NAME=$(PROJECT)_$(BOARD)
-+endif
-+
-+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+
-+AS=$(CROSS_COMPILE)gcc
-+CC=$(CROSS_COMPILE)gcc
-+LD=$(CROSS_COMPILE)gcc
-+NM= $(CROSS_COMPILE)nm
-+SIZE=$(CROSS_COMPILE)size
-+OBJCOPY=$(CROSS_COMPILE)objcopy
-+OBJDUMP=$(CROSS_COMPILE)objdump
-+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
-+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
-+
-+# Linker flags.
-+# -Wl,...: tell GCC to pass this to linker.
-+# -Map: create map file
-+# --cref: add cross reference to map file
-+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
-+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
-+OBJS=crt0_gnu.o
-+
-+endif
-+
-+OBJS+=\
-+ $(BOARD).o \
-+ main.o \
-+ gpio.o \
-+ pmc.o \
-+ debug.o \
-+ sdramc.o \
-+ nandflash.o \
-+ _udivsi3.o \
-+ _umodsi3.o \
-+ div0.o \
-+ udiv.o \
-+ string.o
-+
-+rebuild: clean all
-+
-+all: $(BOOT_NAME)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+$(BOOT_NAME): $(OBJS)
-+ $(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
-+ $(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
-+endif
-+
-+
-+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
-+
-+main.o: $(BOOTSTRAP_PATH)/main.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
-+
-+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
-+
-+pmc.o: $(BOOTSTRAP_PATH)/driver/pmc.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
-+
-+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
-+
-+sdramc.o: $(BOOTSTRAP_PATH)/driver/sdramc.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
-+
-+dataflash.o: $(BOOTSTRAP_PATH)/driver/dataflash.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
-+
-+nandflash.o: $(BOOTSTRAP_PATH)/driver/nandflash.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
-+
-+crt0_gnu.o: $(BOOTSTRAP_PATH)/crt0_gnu.S
-+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
-+
-+div0.o: $(BOOTSTRAP_PATH)/lib/div0.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
-+
-+string.o: $(BOOTSTRAP_PATH)/lib/string.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
-+
-+udiv.o: $(BOOTSTRAP_PATH)/lib/udiv.c
-+ $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
-+
-+_udivsi3.o: $(BOOTSTRAP_PATH)/lib/_udivsi3.S
-+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
-+
-+_umodsi3.o: $(BOOTSTRAP_PATH)/lib/_umodsi3.S
-+ $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
-+
-+clean:
-+ $(ERASE_FCT) *.o *.bin *.elf *.map
-diff --git a/board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h b/board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h
-new file mode 100644
-index 0000000..c0bdc6e
---- /dev/null
-+++ b/board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h
-@@ -0,0 +1,112 @@
-+/* ----------------------------------------------------------------------------
-+ * ATMEL Microcontroller Software Support - ROUSSET -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2008, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name : usb-a9g20-lpw.h
-+ * Object :
-+ * Creation : GH July 6th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#ifndef _USB_A9G20_LPW_H
-+#define _USB_A9G20_LPW_H
-+
-+/* ******************************************************************* */
-+/* PMC Settings */
-+/* */
-+/* The main oscillator is enabled as soon as possible in the c_startup */
-+/* and MCK is switched on the main oscillator. */
-+/* PLL initialization is done later in the hw_init() function */
-+/* ******************************************************************* */
-+#define MASTER_CLOCK (133000000)
-+#define PLL_LOCK_TIMEOUT 1000000
-+
-+/* Set PLLA to 798Mhz */
-+#define PLLA_SETTINGS 0x20843F02
-+#define PLLB_SETTINGS 0x100F3F02
-+
-+/* Switch MCK on PLLA output PCK = PLLA/2 = 3 * MCK */
-+#define MCKR_SETTINGS 0x1300
-+#define MCKR_CSS_SETTINGS (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
-+
-+/* ******************************************************************* */
-+/* NandFlash Settings */
-+/* */
-+/* ******************************************************************* */
-+#define AT91C_SMARTMEDIA_BASE 0x40000000
-+
-+#define AT91_SMART_MEDIA_ALE (1 << 21) /* our ALE is AD21 */
-+#define AT91_SMART_MEDIA_CLE (1 << 22) /* our CLE is AD22 */
-+
-+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
-+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
-+
-+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
-+
-+
-+/* ******************************************************************** */
-+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 133000000.*/
-+/* Please refer to SMC section in AT91SAM9 datasheet to learn how */
-+/* to generate these values. */
-+/* ******************************************************************** */
-+#define AT91C_SM_NWE_SETUP (2 << 0)
-+#define AT91C_SM_NCS_WR_SETUP (0 << 8)
-+#define AT91C_SM_NRD_SETUP (2 << 16)
-+#define AT91C_SM_NCS_RD_SETUP (0 << 24)
-+
-+#define AT91C_SM_NWE_PULSE (4 << 0)
-+#define AT91C_SM_NCS_WR_PULSE (4 << 8)
-+#define AT91C_SM_NRD_PULSE (4 << 16)
-+#define AT91C_SM_NCS_RD_PULSE (4 << 24)
-+
-+#define AT91C_SM_NWE_CYCLE (7 << 0)
-+#define AT91C_SM_NRD_CYCLE (7 << 16)
-+
-+#define AT91C_SM_TDF (3 << 16)
-+
-+/* ******************************************************************* */
-+/* BootStrap Settings */
-+/* */
-+/* ******************************************************************* */
-+#define IMG_ADDRESS 0x20000 /* Image Address in NandFlash */
-+#define IMG_SIZE 0x40000 /* Image Size in NandFlash */
-+
-+#define MACH_TYPE 0x731 /* USB-A9G20 */
-+#define JUMP_ADDR 0x23F00000 /* Final Jump Address */
-+
-+/* ******************************************************************* */
-+/* Application Settings */
-+/* ******************************************************************* */
-+#undef CFG_DEBUG
-+#undef CFG_DATAFLASH
-+
-+#define CFG_NANDFLASH
-+#undef NANDFLASH_SMALL_BLOCKS /* NANDFLASH_LARGE_BLOCKS used instead */
-+#undef CFG_NANDFLASH_RECOVERY
-+
-+#define CFG_SDRAM
-+#define CFG_HW_INIT
-+
-+#endif /* _USB_A9G20_LPW_H */
-diff --git a/board/usb_a9g20_lpw/usb_a9g20_lpw.c b/board/usb_a9g20_lpw/usb_a9g20_lpw.c
-new file mode 100644
-index 0000000..c372307
---- /dev/null
-+++ b/board/usb_a9g20_lpw/usb_a9g20_lpw.c
-@@ -0,0 +1,303 @@
-+/* ----------------------------------------------------------------------------
-+ * ATMEL Microcontroller Software Support - ROUSSET -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2008, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name : usb_a9g20_lpw.c
-+ * Object :
-+ * Creation : GH July 6th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#include "../../include/part.h"
-+#include "../../include/gpio.h"
-+#include "../../include/pmc.h"
-+#include "../../include/debug.h"
-+#include "../../include/sdramc.h"
-+#include "../../include/main.h"
-+#ifdef CFG_NANDFLASH
-+#include "../../include/nandflash.h"
-+#endif
-+#ifdef CFG_DATAFLASH
-+#include "../../include/dataflash.h"
-+#endif
-+
-+static inline unsigned int get_cp15(void)
-+{
-+ unsigned int value;
-+ __asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
-+ return value;
-+}
-+
-+static inline void set_cp15(unsigned int value)
-+{
-+ __asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
-+}
-+
-+#ifdef CFG_HW_INIT
-+/*----------------------------------------------------------------------------*/
-+/* \fn hw_init */
-+/* \brief This function performs very low level HW initialization */
-+/* This function is invoked as soon as possible during the c_startup */
-+/* The bss segment must be initialized */
-+/*----------------------------------------------------------------------------*/
-+void hw_init(void)
-+{
-+ unsigned int cp15;
-+
-+ /* Configure PIOs */
-+ const struct pio_desc hw_pio[] = {
-+#ifdef CFG_DEBUG
-+ {"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Disable watchdog */
-+ writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
-+
-+ /* At this stage the main oscillator is supposed to be enabled
-+ * PCK = MCK = MOSC */
-+ writel(0x00, AT91C_BASE_PMC + PMC_PLLICPR);
-+
-+ /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
-+ pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+ /* PCK = PLLA/2 = 3 * MCK */
-+ pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
-+ /* Switch MCK on PLLA output */
-+ pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+ /* Configure PLLB */
-+ pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+ /* Configure CP15 */
-+ cp15 = get_cp15();
-+ cp15 |= I_CACHE;
-+ set_cp15(cp15);
-+
-+ /* Configure the PIO controller */
-+ pio_setup(hw_pio);
-+
-+ /* Configure the EBI Slave Slot Cycle to 64 */
-+ writel((readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
-+
-+#ifdef CFG_DEBUG
-+ /* Enable Debug messages on the DBGU */
-+ dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
-+
-+ dbg_print("Start AT91Bootstrap...\n\r");
-+#endif /* CFG_DEBUG */
-+
-+#ifdef CFG_SDRAM
-+ /* Initialize the matrix (VDDIOSEL=0: memory voltage = 1.8V ) */
-+ writel((readl(AT91C_BASE_CCFG + CCFG_EBICSA) & ~0x00010000) | AT91C_EBI_CS1A_SDRAMC , AT91C_BASE_CCFG + CCFG_EBICSA);
-+
-+ /* Configure SDRAM Controller */
-+ sdram_init( AT91C_SDRAMC_NC_9 |
-+ AT91C_SDRAMC_NR_13 |
-+ AT91C_SDRAMC_CAS_3 |
-+ AT91C_SDRAMC_NB_4_BANKS |
-+ AT91C_SDRAMC_DBW_32_BITS |
-+ AT91C_SDRAMC_TWR_3 |
-+ AT91C_SDRAMC_TRC_9 |
-+ AT91C_SDRAMC_TRP_3 |
-+ AT91C_SDRAMC_TRCD_3 |
-+ AT91C_SDRAMC_TRAS_6 |
-+ AT91C_SDRAMC_TXSR_10, /* Control Register */
-+ (MASTER_CLOCK * 7)/1000000, /* Refresh Timer Register */
-+ AT91C_SDRAMC_MD_SDRAM); /* SDRAM (no low power) */
-+
-+#endif /* CFG_SDRAM */
-+}
-+#endif /* CFG_HW_INIT */
-+
-+#ifdef CFG_SDRAM
-+/*------------------------------------------------------------------------------*/
-+/* \fn sdramc_hw_init */
-+/* \brief This function performs SDRAMC HW initialization */
-+/*------------------------------------------------------------------------------*/
-+void sdramc_hw_init(void)
-+{
-+ /* Configure PIOs */
-+/* const struct pio_desc sdramc_pio[] = {
-+ {"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+*/
-+ /* Configure the SDRAMC PIO controller to output PCK0 */
-+/* pio_setup(sdramc_pio); */
-+
-+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
-+ writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
-+
-+}
-+#endif /* CFG_SDRAM */
-+
-+#ifdef CFG_DATAFLASH
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn df_recovery */
-+/* \brief This function erases DataFlash Page 0 if USR PB is pressed */
-+/* during boot sequence */
-+/*------------------------------------------------------------------------------*/
-+void df_recovery(AT91PS_DF pDf)
-+{
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS1_DATAFLASH)
-+ /* Configure PIOs */
-+ const struct pio_desc usrpb[] = {
-+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Configure the PIO controller */
-+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+ pio_setup(usrpb);
-+
-+ /* If USR PB is pressed during Boot sequence */
-+ /* Erase NandFlash block 0*/
-+ if ( !pio_get_value(AT91C_PIN_PB(10)) )
-+ df_page_erase(pDf, 0);
-+#endif
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn df_hw_init */
-+/* \brief This function performs DataFlash HW initialization */
-+/*------------------------------------------------------------------------------*/
-+void df_hw_init(void)
-+{
-+ /* Configure PIOs */
-+ const struct pio_desc df_pio[] = {
-+ {"MISO", AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"MOSI", AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ {"SPCK", AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
-+ {"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS1_DATAFLASH)
-+ {"NPCS1", AT91C_PIN_PC(11), 0, PIO_DEFAULT, PIO_PERIPH_B},
-+#endif
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Configure the PIO controller */
-+ pio_setup(df_pio);
-+}
-+#endif /* CFG_DATAFLASH */
-+
-+
-+
-+#ifdef CFG_NANDFLASH
-+/*------------------------------------------------------------------------------*/
-+/* \fn nand_recovery */
-+/* \brief This function erases NandFlash Block 0 if USER PB is pressed */
-+/* during boot sequence */
-+/*------------------------------------------------------------------------------*/
-+#ifdef CFG_NANDFLASH_RECOVERY
-+static void nand_recovery(void)
-+{
-+ /* Configure PIOs */
-+ const struct pio_desc usrpb[] = {
-+ {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Configure the PIO controller */
-+ writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+ pio_setup(usrpb);
-+
-+ /* If USER PB is pressed during Boot sequence */
-+ /* Erase NandFlash block 0*/
-+ if (!pio_get_value(AT91C_PIN_PB(10)) )
-+ AT91F_NandEraseBlock0();
-+}
-+#else
-+static void nand_recovery(void) {}
-+#endif
-+/*------------------------------------------------------------------------------*/
-+/* \fn nandflash_hw_init */
-+/* \brief NandFlash HW init */
-+/*------------------------------------------------------------------------------*/
-+void nandflash_hw_init(void)
-+{
-+ /* Configure PIOs */
-+ const struct pio_desc nand_pio[] = {
-+ {"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
-+ {"NANDCS", AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
-+ {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+ };
-+
-+ /* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
-+ writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
-+
-+ /* Configure SMC CS3 */
-+ writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
-+ writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
-+ writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE) , AT91C_BASE_SMC + SMC_CYCLE3);
-+ writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE |
-+ AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF) , AT91C_BASE_SMC + SMC_CTRL3);
-+
-+ /* Configure the PIO controller */
-+ writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
-+ pio_setup(nand_pio);
-+
-+ nand_recovery();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn nandflash_cfg_16bits_dbw_init */
-+/* \brief Configure SMC in 16 bits mode */
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_16bits_dbw_init(void)
-+{
-+ writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn nandflash_cfg_8bits_dbw_init */
-+/* \brief Configure SMC in 8 bits mode */
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_8bits_dbw_init(void)
-+{
-+ writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+#endif /* #ifdef CFG_NANDFLASH */
-diff --git a/crt0_gnu.S b/crt0_gnu.S
-index 042b617..002feef 100644
---- a/crt0_gnu.S
-+++ b/crt0_gnu.S
-@@ -106,6 +106,13 @@ _relocate_to_sram:
- #endif /* CFG_NORFLASH */
-
- _setup_clocks:
-+/* Test if main osc is bypassed */
-+ ldr r0,=AT91C_PMC_MOR
-+ ldr r1, [r0]
-+ ldr r2,=AT91C_CKGR_OSCBYPASS
-+ ands r1, r1, r2
-+ bne _init_data /* branch if OSCBYPASS=1 */
-+
- /* Test if main oscillator is enabled */
- ldr r0,=AT91C_PMC_SR
- ldr r1, [r0]
-diff --git a/include/part.h b/include/part.h
-index ba5985a..1d7392a 100644
---- a/include/part.h
-+++ b/include/part.h
-@@ -46,7 +46,11 @@
-
- #ifdef AT91SAM9G20
- #include "AT91SAM9260_inc.h"
--#include "at91sam9g20ek.h"
-+ #ifdef at91sam9g20ek
-+ #include "at91sam9g20ek.h"
-+ #elif usb_a9g20_lpw
-+ #include "usb-a9g20-lpw.h"
-+ #endif
- #endif
-
- #ifdef AT91SAM9261
---
-1.5.6.3
-
+++ /dev/null
-diff --git a/arch/arm/configs/usb_a9g20_defconfig b/arch/arm/configs/usb_a9g20_defconfig
-index 30bf380..7716e0e 100644
---- a/arch/arm/configs/usb_a9g20_defconfig
-+++ b/arch/arm/configs/usb_a9g20_defconfig
-@@ -15,6 +15,7 @@ CONFIG_HUSH_FANCY_PROMPT=y
- CONFIG_CMDLINE_EDITING=y
- CONFIG_AUTO_COMPLETE=y
- CONFIG_MENU=y
-+# CONFIG_ERRNO_MESSAGES is not set
- # CONFIG_CONSOLE_ACTIVATE_FIRST is not set
- CONFIG_CONSOLE_ACTIVATE_ALL=y
- CONFIG_PARTITION=y
+++ /dev/null
-BR2_arm=y
-BR2_arm926t=y
-BR2_GLOBAL_PATCH_DIR="board/calao/qil-a9260/patches"
-BR2_TARGET_GENERIC_GETTY_PORT="ttyS1"
-# Linux headers same as kernel, a 3.4 series
-BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_4=y
-BR2_PACKAGE_HOST_SAM_BA=y
-BR2_TARGET_ROOTFS_UBIFS=y
-BR2_TARGET_AT91BOOTSTRAP=y
-BR2_TARGET_AT91BOOTSTRAP_BOARD="qil_a9260"
-BR2_TARGET_AT91BOOTSTRAP_NANDFLASH=y
-BR2_TARGET_BAREBOX=y
-BR2_TARGET_BAREBOX_CUSTOM_VERSION=y
-BR2_TARGET_BAREBOX_CUSTOM_VERSION_VALUE="2012.08.0"
-BR2_TARGET_BAREBOX_BOARD_DEFCONFIG="qil_a9260"
-BR2_LINUX_KERNEL=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="3.4.7"
-BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
-BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/calao/qil-a9260/linux-3.4.7.config"
+++ /dev/null
-# architecture
-BR2_arm=y
-BR2_arm926t=y
-
-# system
-BR2_PACKAGE_HOST_SAM_BA=y
-
-# filesystem
-BR2_TARGET_ROOTFS_UBIFS=y
-
-# Linux headers same as kernel, a 3.9 series
-BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_9=y
-
-# bootloaders
-BR2_TARGET_AT91BOOTSTRAP=y
-BR2_TARGET_AT91BOOTSTRAP_CUSTOM_PATCH_DIR="board/calao/tny-a9g20-lpw"
-BR2_TARGET_AT91BOOTSTRAP_BOARD="tny_a9g20_lpw"
-BR2_TARGET_AT91BOOTSTRAP_NANDFLASH=y
-BR2_TARGET_BAREBOX=y
-BR2_TARGET_BAREBOX_BOARD_DEFCONFIG="tny_a9g20"
-
-# linux
-BR2_LINUX_KERNEL=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="3.9.4"
-BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
-BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/calao/tny-a9g20-lpw/linux-3.9.config"
-BR2_LINUX_KERNEL_DTS_SUPPORT=y
-BR2_LINUX_KERNEL_INTREE_DTS_NAME="tny_a9g20"
+++ /dev/null
-BR2_arm=y
-BR2_arm926t=y
-# Linux headers same as kernel, a 3.10 series
-BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_10=y
-BR2_PACKAGE_MTD=y
-BR2_PACKAGE_HOST_SAM_BA=y
-BR2_TARGET_ROOTFS_UBIFS=y
-BR2_TARGET_AT91BOOTSTRAP=y
-BR2_TARGET_AT91BOOTSTRAP_CUSTOM_PATCH_DIR="board/calao/usb-a9260"
-BR2_TARGET_AT91BOOTSTRAP_BOARD="usb_a9260"
-BR2_TARGET_AT91BOOTSTRAP_NANDFLASH=y
-BR2_TARGET_BAREBOX=y
-BR2_TARGET_BAREBOX_BOARD_DEFCONFIG="usb_a9260"
-BR2_LINUX_KERNEL=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="3.10.10"
-BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
-BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/calao/usb-a9260/linux-3.7.4.config"
+++ /dev/null
-BR2_arm=y
-BR2_arm926t=y
-# Linux headers same as kernel, a 3.10 series
-BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_10=y
-BR2_PACKAGE_HOST_SAM_BA=y
-BR2_TARGET_ROOTFS_UBIFS=y
-BR2_TARGET_AT91BOOTSTRAP=y
-BR2_TARGET_AT91BOOTSTRAP_CUSTOM_PATCH_DIR="board/calao/usb-a9263"
-BR2_TARGET_AT91BOOTSTRAP_BOARD="usb_a9263"
-BR2_TARGET_AT91BOOTSTRAP_NANDFLASH=y
-BR2_TARGET_BAREBOX=y
-BR2_TARGET_BAREBOX_BOARD_DEFCONFIG="usb_a9263"
-BR2_LINUX_KERNEL=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="3.10.10"
-BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
-BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/calao/usb-a9263/linux-3.4.4.config"
+++ /dev/null
-BR2_arm=y
-BR2_arm926t=y
-# Linux headers same as kernel, a 3.10 series
-BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_3_10=y
-BR2_GLOBAL_PATCH_DIR="board/calao/usb-a9g20-lpw/patches"
-BR2_PACKAGE_HOST_SAM_BA=y
-BR2_TARGET_ROOTFS_UBIFS=y
-BR2_TARGET_AT91BOOTSTRAP=y
-BR2_TARGET_AT91BOOTSTRAP_BOARD="usb_a9g20_lpw"
-BR2_TARGET_AT91BOOTSTRAP_NANDFLASH=y
-BR2_TARGET_BAREBOX=y
-BR2_TARGET_BAREBOX_BOARD_DEFCONFIG="usb_a9g20"
-BR2_LINUX_KERNEL=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="3.10.10"
-BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
-BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/calao/usb-a9g20-lpw/linux-3.4.4.config"
projects / buildroot.git / commitdiff