IBM Z: Fix constraints in vpdi patterns

The destination register is only partially overwritten, so + should be
used instead of =.

gcc/ChangeLog:

2021-01-08  Ilya Leoshkevich  <iii@linux.ibm.com>

	* config/s390/vector.md (*tf_to_fprx2_0): Rename from
	"*mov_tf_to_fprx2_0" for consistency, fix constraint.
	(*tf_to_fprx2_1): Rename from "*mov_tf_to_fprx2_1" for
	consistency, fix constraint.

diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md
index 5b8d75f18f08bd3ee3645380bc3cddef44b78236..0e3c31f5d4f814ebbe0c11c609046016b770a323 100644 (file)
--- a/gcc/config/s390/vector.md
+++ b/gcc/config/s390/vector.md
@@ -737,16 +737,16 @@
   "vperm\t%v0,%v1,%v2,%v3"
   [(set_attr "op_type" "VRR")])
 
-(define_insn "*mov_tf_to_fprx2_0"
-  [(set (subreg:DF (match_operand:FPRX2 0 "nonimmediate_operand" "=f") 0)
+(define_insn "*tf_to_fprx2_0"
+  [(set (subreg:DF (match_operand:FPRX2 0 "nonimmediate_operand" "+f") 0)
        (subreg:DF (match_operand:TF    1 "general_operand"       "v") 0))]
   "TARGET_VXE"
   ; M4 == 1 corresponds to %v0[0] = %v1[0]; %v0[1] = %v0[1];
   "vpdi\t%v0,%v1,%v0,1"
   [(set_attr "op_type" "VRR")])
 
-(define_insn "*mov_tf_to_fprx2_1"
-  [(set (subreg:DF (match_operand:FPRX2 0 "nonimmediate_operand" "=f") 8)
+(define_insn "*tf_to_fprx2_1"
+  [(set (subreg:DF (match_operand:FPRX2 0 "nonimmediate_operand" "+f") 8)
        (subreg:DF (match_operand:TF    1 "general_operand"       "v") 8))]
   "TARGET_VXE"
   ; M4 == 5 corresponds to %V0[0] = %v1[1]; %V0[1] = %V0[1];