re PR target/81414 (ICE in fma steering on AArch64/cortex-a57)

	PR target/81414
	* config/aarch64/cortex-a57-fma-steering.c (analyze): Skip fmul/fmac
	instructions if no du chain is found.

	gcc/testsuite
	* gcc.target/aarch64/pr81414.C: New.

From-SVN: r250496

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3ff7b902b4adfc21819d896fe261af0648d7871d..24d9088b3f7e71075a0c4cecdf24303a5a9c56a9 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2017-07-25  Bin Cheng  <bin.cheng@arm.com>
+
+       PR target/81414
+       * config/aarch64/cortex-a57-fma-steering.c (analyze): Skip fmul/fmac
+       instructions if no du chain is found.
+
 2017-07-25  Georg-Johann Lay  <avr@gjlay.de>
 
        * config/avr/avr-log.c (avr_log_vadump) ['T']: Print NULL-TREE.

diff --git a/gcc/config/aarch64/cortex-a57-fma-steering.c b/gcc/config/aarch64/cortex-a57-fma-steering.c
index 6d90acdd4a21175df72e9958729d451ed12562be..fa8c56aab022919121aa093051ea1090865d41fa 100644 (file)
--- a/gcc/config/aarch64/cortex-a57-fma-steering.c
+++ b/gcc/config/aarch64/cortex-a57-fma-steering.c
@@ -973,10 +973,17 @@ func_fma_steering::analyze ()
                break;
            }
 
-         /* We didn't find a chain with a def for this instruction.  */
-         gcc_assert (i < dest_op_info->n_chains);
-
-         this->analyze_fma_fmul_insn (forest, chain, head);
+         /* Due to implementation of regrename, dest register can slip away
+            from regrename's analysis.  As a result, there is no chain for
+            the destination register of insn.  We simply skip the insn even
+            it is a fmul/fmac instruction.  This can happen when the dest
+            register is also a source register of insn and one of the below
+            conditions is satisfied:
+              1) the source reg is setup in larger mode than this insn;
+              2) the source reg is uninitialized;
+              3) the source reg is passed in as parameter.  */
+         if (i < dest_op_info->n_chains)
+           this->analyze_fma_fmul_insn (forest, chain, head);
        }
     }
   free (bb_dfs_preorder);

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 82119f104dd2c1e1a6ce2f1c5233f064aefd0754..aef24ec7a77433778a302c9174632a2ff764122a 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2017-07-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       PR target/81414
+       * gcc.target/aarch64/pr81414.C: New.
+
 2017-07-25  Richard Biener  <rguenther@suse.de>
 
        PR middle-end/81505

diff --git a/gcc/testsuite/gcc.target/aarch64/pr81414.C b/gcc/testsuite/gcc.target/aarch64/pr81414.C
new file mode 100644 (file)
index 0000000..53dfc7c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr81414.C
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=cortex-a57" } */
+
+typedef __Float32x2_t float32x2_t;
+float32x2_t
+foo1 (float32x2_t __a, float32x2_t __b, float32x2_t __c) {
+  return __b * __c + __a;
+}
+