radeonsi: remove old_va parameter from si_rebind_buffer by remembering offsets

This is a prerequisite for the next commit.

Cc: 19.1 <mesa-stable@lists.freedesktop.org>

diff --git a/src/gallium/drivers/radeonsi/si_buffer.c b/src/gallium/drivers/radeonsi/si_buffer.c
index 4936eb5a5b11eb93769e607cc0855a17b0c1fb52..76705937b65fb7844f855f2299186e5f3c955494 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_buffer.c
+++ b/src/gallium/drivers/radeonsi/si_buffer.c
@@ -287,11 +287,9 @@ si_invalidate_buffer(struct si_context *sctx,
        /* Check if mapping this buffer would cause waiting for the GPU. */
        if (si_rings_is_buffer_referenced(sctx, buf->buf, RADEON_USAGE_READWRITE) ||
            !sctx->ws->buffer_wait(buf->buf, 0, RADEON_USAGE_READWRITE)) {
-               uint64_t old_va = buf->gpu_address;
-
                /* Reallocate the buffer in the same pipe_resource. */
                si_alloc_resource(sctx->screen, buf);
-               si_rebind_buffer(sctx, &buf->b.b, old_va);
+               si_rebind_buffer(sctx, &buf->b.b);
        } else {
                util_range_set_empty(&buf->valid_buffer_range);
        }
@@ -307,7 +305,6 @@ void si_replace_buffer_storage(struct pipe_context *ctx,
        struct si_context *sctx = (struct si_context*)ctx;
        struct si_resource *sdst = si_resource(dst);
        struct si_resource *ssrc = si_resource(src);
-       uint64_t old_gpu_address = sdst->gpu_address;
 
        pb_reference(&sdst->buf, ssrc->buf);
        sdst->gpu_address = ssrc->gpu_address;
@@ -322,7 +319,7 @@ void si_replace_buffer_storage(struct pipe_context *ctx,
        assert(sdst->bo_alignment == ssrc->bo_alignment);
        assert(sdst->domains == ssrc->domains);
 
-       si_rebind_buffer(sctx, dst, old_gpu_address);
+       si_rebind_buffer(sctx, dst);
 }
 
 static void si_invalidate_resource(struct pipe_context *ctx,

diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 9daf36f6c407cb8dcd7f2d6ade2c8c10361f343b..14c1306ae2123555baff93792858bc9a293298aa 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -992,6 +992,7 @@ static void si_init_buffer_resources(struct si_buffer_resources *buffers,
        buffers->priority = priority;
        buffers->priority_constbuf = priority_constbuf;
        buffers->buffers = CALLOC(num_buffers, sizeof(struct pipe_resource*));
+       buffers->offsets = CALLOC(num_buffers, sizeof(buffers->offsets[0]));
 
        si_init_descriptors(descs, shader_userdata_rel_index, 4, num_buffers);
 }
@@ -1006,6 +1007,7 @@ static void si_release_buffer_resources(struct si_buffer_resources *buffers,
        }
 
        FREE(buffers->buffers);
+       FREE(buffers->offsets);
 }
 
 static void si_buffer_resources_begin_new_cs(struct si_context *sctx,
@@ -1205,11 +1207,10 @@ static void si_set_constant_buffer(struct si_context *sctx,
        if (input && (input->buffer || input->user_buffer)) {
                struct pipe_resource *buffer = NULL;
                uint64_t va;
+               unsigned buffer_offset;
 
                /* Upload the user buffer if needed. */
                if (input->user_buffer) {
-                       unsigned buffer_offset;
-
                        si_upload_const_buffer(sctx,
                                               (struct si_resource**)&buffer, input->user_buffer,
                                               input->buffer_size, &buffer_offset);
@@ -1218,12 +1219,13 @@ static void si_set_constant_buffer(struct si_context *sctx,
                                si_set_constant_buffer(sctx, buffers, descriptors_idx, slot, NULL);
                                return;
                        }
-                       va = si_resource(buffer)->gpu_address + buffer_offset;
                } else {
                        pipe_resource_reference(&buffer, input->buffer);
-                       va = si_resource(buffer)->gpu_address + input->buffer_offset;
+                       buffer_offset = input->buffer_offset;
                }
 
+               va = si_resource(buffer)->gpu_address + buffer_offset;
+
                /* Set the descriptor. */
                uint32_t *desc = descs->list + slot*4;
                desc[0] = va;
@@ -1238,6 +1240,7 @@ static void si_set_constant_buffer(struct si_context *sctx,
                          S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
 
                buffers->buffers[slot] = buffer;
+               buffers->offsets[slot] = buffer_offset;
                radeon_add_to_gfx_buffer_list_check_mem(sctx,
                                                        si_resource(buffer),
                                                        RADEON_USAGE_READ,
@@ -1322,6 +1325,7 @@ static void si_set_shader_buffer(struct si_context *sctx,
                  S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
 
        pipe_resource_reference(&buffers->buffers[slot], &buf->b.b);
+       buffers->offsets[slot] = sbuffer->buffer_offset;
        radeon_add_to_gfx_buffer_list_check_mem(sctx, buf,
                                                writable ? RADEON_USAGE_READWRITE :
                                                           RADEON_USAGE_READ,
@@ -1491,20 +1495,6 @@ void si_set_ring_buffer(struct si_context *sctx, uint slot,
        sctx->descriptors_dirty |= 1u << SI_DESCS_RW_BUFFERS;
 }
 
-static void si_desc_reset_buffer_offset(uint32_t *desc, uint64_t old_buf_va,
-                                       struct pipe_resource *new_buf)
-{
-       /* Retrieve the buffer offset from the descriptor. */
-       uint64_t old_desc_va = si_desc_extract_buffer_address(desc);
-
-       assert(old_buf_va <= old_desc_va);
-       uint64_t offset_within_buffer = old_desc_va - old_buf_va;
-
-       /* Update the descriptor. */
-       si_set_buf_desc_address(si_resource(new_buf), offset_within_buffer,
-                               desc);
-}
-
 /* INTERNAL CONST BUFFERS */
 
 static void si_set_polygon_stipple(struct pipe_context *ctx,
@@ -1589,7 +1579,6 @@ static void si_reset_buffer_resources(struct si_context *sctx,
                                      unsigned descriptors_idx,
                                      unsigned slot_mask,
                                      struct pipe_resource *buf,
-                                     uint64_t old_va,
                                      enum radeon_bo_priority priority)
 {
        struct si_descriptors *descs = &sctx->descriptors[descriptors_idx];
@@ -1598,8 +1587,8 @@ static void si_reset_buffer_resources(struct si_context *sctx,
        while (mask) {
                unsigned i = u_bit_scan(&mask);
                if (buffers->buffers[i] == buf) {
-                       si_desc_reset_buffer_offset(descs->list + i*4,
-                                                   old_va, buf);
+                       si_set_buf_desc_address(si_resource(buf), buffers->offsets[i],
+                                               descs->list + i*4);
                        sctx->descriptors_dirty |= 1u << descriptors_idx;
 
                        radeon_add_to_gfx_buffer_list_check_mem(sctx,
@@ -1615,8 +1604,7 @@ static void si_reset_buffer_resources(struct si_context *sctx,
 /* Update all resource bindings where the buffer is bound, including
  * all resource descriptors. This is invalidate_buffer without
  * the invalidation. */
-void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf,
-                     uint64_t old_va)
+void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf)
 {
        struct si_resource *buffer = si_resource(buf);
        unsigned i, shader;
@@ -1656,8 +1644,8 @@ void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf,
                        if (buffers->buffers[i] != buf)
                                continue;
 
-                       si_desc_reset_buffer_offset(descs->list + i*4,
-                                                   old_va, buf);
+                       si_set_buf_desc_address(si_resource(buf), buffers->offsets[i],
+                                               descs->list + i*4);
                        sctx->descriptors_dirty |= 1u << SI_DESCS_RW_BUFFERS;
 
                        radeon_add_to_gfx_buffer_list_check_mem(sctx,
@@ -1680,7 +1668,7 @@ void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf,
                        si_reset_buffer_resources(sctx, &sctx->const_and_shader_buffers[shader],
                                                  si_const_and_shader_buffer_descriptors_idx(shader),
                                                  u_bit_consecutive(SI_NUM_SHADER_BUFFERS, SI_NUM_CONST_BUFFERS),
-                                                 buf, old_va,
+                                                 buf,
                                                  sctx->const_and_shader_buffers[shader].priority_constbuf);
        }
 
@@ -1689,7 +1677,7 @@ void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf,
                        si_reset_buffer_resources(sctx, &sctx->const_and_shader_buffers[shader],
                                                  si_const_and_shader_buffer_descriptors_idx(shader),
                                                  u_bit_consecutive(0, SI_NUM_SHADER_BUFFERS),
-                                                 buf, old_va,
+                                                 buf,
                                                  sctx->const_and_shader_buffers[shader].priority);
        }
 
@@ -1706,9 +1694,9 @@ void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf,
                                if (samplers->views[i]->texture == buf) {
                                        unsigned desc_slot = si_get_sampler_slot(i);
 
-                                       si_desc_reset_buffer_offset(descs->list +
-                                                                   desc_slot * 16 + 4,
-                                                                   old_va, buf);
+                                       si_set_buf_desc_address(si_resource(buf),
+                                                               samplers->views[i]->u.buf.offset,
+                                                               descs->list + desc_slot * 16 + 4);
                                        sctx->descriptors_dirty |=
                                                1u << si_sampler_and_image_descriptors_idx(shader);
 
@@ -1738,9 +1726,9 @@ void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf,
                                        if (images->views[i].access & PIPE_IMAGE_ACCESS_WRITE)
                                                si_mark_image_range_valid(&images->views[i]);
 
-                                       si_desc_reset_buffer_offset(
-                                               descs->list + desc_slot * 8 + 4,
-                                               old_va, buf);
+                                       si_set_buf_desc_address(si_resource(buf),
+                                                               images->views[i].u.buf.offset,
+                                                               descs->list + desc_slot * 8 + 4);
                                        sctx->descriptors_dirty |=
                                                1u << si_sampler_and_image_descriptors_idx(shader);
 

diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index 66a2024144673ea8f8a1c4a595b6b9eaa54198eb..761e61899b1950fa2ad7f607c74dddab469f56c1 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -447,6 +447,7 @@ struct si_descriptors {
 
 struct si_buffer_resources {
        struct pipe_resource            **buffers; /* this has num_buffers elements */
+       unsigned                        *offsets; /* this has num_buffers elements */
 
        enum radeon_bo_priority         priority:6;
        enum radeon_bo_priority         priority_constbuf:6;
@@ -525,8 +526,7 @@ struct pb_slab *si_bindless_descriptor_slab_alloc(void *priv, unsigned heap,
                                                  unsigned entry_size,
                                                  unsigned group_index);
 void si_bindless_descriptor_slab_free(void *priv, struct pb_slab *pslab);
-void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf,
-                     uint64_t old_va);
+void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf);
 /* si_state.c */
 void si_init_state_compute_functions(struct si_context *sctx);
 void si_init_state_functions(struct si_context *sctx);