freedreno/ir3: debug cleanup
authorRob Clark <robdclark@chromium.org>
Mon, 14 Oct 2019 17:42:25 +0000 (10:42 -0700)
committerRob Clark <robdclark@chromium.org>
Thu, 24 Oct 2019 20:08:56 +0000 (13:08 -0700)
1) deduplicate IR3_SHADER_DEBUG=disasm versus fs/vs/etc handling
2) standardize shader stage name prints, in particular VERT vs BVERT
3) don't mix stderr and stdout

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
src/freedreno/ir3/ir3_compiler.h
src/freedreno/ir3/ir3_context.c
src/freedreno/ir3/ir3_shader.c
src/freedreno/ir3/ir3_shader.h
src/gallium/drivers/freedreno/ir3/ir3_cmdline.c
src/gallium/drivers/freedreno/ir3/ir3_gallium.c

index e621b3689afc08d9b71ad6117f16f1daf52accb9..1eac00adccbff995429898f8549cbeedee312e06 100644 (file)
@@ -99,6 +99,9 @@ extern enum ir3_shader_debug ir3_shader_debug;
 static inline bool
 shader_debug_enabled(gl_shader_stage type)
 {
+       if (ir3_shader_debug & IR3_DBG_DISASM)
+               return true;
+
        switch (type) {
        case MESA_SHADER_VERTEX:      return !!(ir3_shader_debug & IR3_DBG_SHADER_VS);
        case MESA_SHADER_TESS_CTRL:   return !!(ir3_shader_debug & IR3_DBG_SHADER_TCS);
index a75bbfa1effabeb559a0339b4898e619cccf9571..2543991f8d9328d059a6bd54245abd65e1b62557 100644 (file)
@@ -104,17 +104,10 @@ ir3_context_init(struct ir3_compiler *compiler,
 
        NIR_PASS_V(ctx->s, nir_convert_from_ssa, true);
 
-       if (ir3_shader_debug & IR3_DBG_DISASM) {
-               DBG("dump nir%dv%d: type=%d, k={cts=%u,hp=%u}",
-                       so->shader->id, so->id, so->type,
-                       so->key.color_two_side, so->key.half_precision);
-               nir_print_shader(ctx->s, stdout);
-       }
-
        if (shader_debug_enabled(so->type)) {
-               fprintf(stderr, "NIR (final form) for %s shader:\n",
-                       _mesa_shader_stage_to_string(so->type));
-               nir_print_shader(ctx->s, stderr);
+               fprintf(stdout, "NIR (final form) for %s shader %s:\n",
+                       ir3_shader_stage(so), so->shader->nir->info.name);
+               nir_print_shader(ctx->s, stdout);
        }
 
        ir3_ibo_mapping_init(&so->image_mapping, ctx->s->info.num_textures);
index 7a0c28fd1a3776c339270cf7fc0869d754dc99de..0cfb28e1c495ad276a9b8f93861eba1672975021 100644 (file)
@@ -165,24 +165,16 @@ assemble_variant(struct ir3_shader_variant *v)
        v->bo = fd_bo_new(compiler->dev, sz,
                        DRM_FREEDRENO_GEM_CACHE_WCOMBINE |
                        DRM_FREEDRENO_GEM_TYPE_KMEM,
-                       "%s:%s", ir3_shader_stage(v->shader), info->name);
+                       "%s:%s", ir3_shader_stage(v), info->name);
 
        memcpy(fd_bo_map(v->bo), bin, sz);
 
-       if (ir3_shader_debug & IR3_DBG_DISASM) {
-               struct ir3_shader_key key = v->key;
-               printf("disassemble: type=%d, k={bp=%u,cts=%u,hp=%u}\n", v->type,
-                       v->binning_pass, key.color_two_side, key.half_precision);
-               ir3_shader_disasm(v, bin, stdout);
-       }
-
        if (shader_debug_enabled(v->shader->type)) {
-               fprintf(stderr, "Native code for unnamed %s shader %s:\n",
-                       _mesa_shader_stage_to_string(v->shader->type),
-                       v->shader->nir->info.name);
+               fprintf(stdout, "Native code for unnamed %s shader %s:\n",
+                       ir3_shader_stage(v), v->shader->nir->info.name);
                if (v->shader->type == MESA_SHADER_FRAGMENT)
-                       fprintf(stderr, "SIMD0\n");
-               ir3_shader_disasm(v, bin, stderr);
+                       fprintf(stdout, "SIMD0\n");
+               ir3_shader_disasm(v, bin, stdout);
        }
 
        free(bin);
@@ -382,7 +374,7 @@ ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin, FILE *out)
 {
        struct ir3 *ir = so->ir;
        struct ir3_register *reg;
-       const char *type = ir3_shader_stage(so->shader);
+       const char *type = ir3_shader_stage(so);
        uint8_t regid;
        unsigned i;
 
index ee4eae504c16c195d489725cce20b797b7f3f636..dd613f2b52cbb79ba9e2512b18456f4cb6f904d9 100644 (file)
@@ -559,13 +559,28 @@ struct ir3_shader_variant {
        struct ir3_sampler_prefetch sampler_prefetch[IR3_MAX_SAMPLER_PREFETCH];
 };
 
+static inline const char *
+ir3_shader_stage(struct ir3_shader_variant *v)
+{
+       switch (v->type) {
+       case MESA_SHADER_VERTEX:     return v->binning_pass ? "BVERT" : "VERT";
+       case MESA_SHADER_TESS_CTRL:  return "TCS";
+       case MESA_SHADER_TESS_EVAL:  return "TES";
+       case MESA_SHADER_GEOMETRY:   return "GEOM";
+       case MESA_SHADER_FRAGMENT:   return "FRAG";
+       case MESA_SHADER_COMPUTE:    return "CL";
+       default:
+               unreachable("invalid type");
+               return NULL;
+       }
+}
+
 struct ir3_ubo_range {
        uint32_t offset; /* start offset of this block in const register file */
        uint32_t start, end; /* range of block that's actually used */
 };
 
-struct ir3_ubo_analysis_state
-{
+struct ir3_ubo_analysis_state {
        struct ir3_ubo_range range[IR3_MAX_CONSTANT_BUFFERS];
        uint32_t size;
        uint32_t lower_count;
@@ -611,22 +626,6 @@ uint64_t ir3_shader_outputs(const struct ir3_shader *so);
 int
 ir3_glsl_type_size(const struct glsl_type *type, bool bindless);
 
-static inline const char *
-ir3_shader_stage(struct ir3_shader *shader)
-{
-       switch (shader->type) {
-       case MESA_SHADER_VERTEX:     return "VERT";
-       case MESA_SHADER_TESS_CTRL:  return "TCS";
-       case MESA_SHADER_TESS_EVAL:  return "TES";
-       case MESA_SHADER_GEOMETRY:   return "GEOM";
-       case MESA_SHADER_FRAGMENT:   return "FRAG";
-       case MESA_SHADER_COMPUTE:    return "CL";
-       default:
-               unreachable("invalid type");
-               return NULL;
-       }
-}
-
 /*
  * Helper/util:
  */
index 246bafdf490d32455437a3d140df54bafcbc887d..271ee23a9c20480ad91cc4999793556fd8b0dd1d 100644 (file)
@@ -57,7 +57,7 @@
 static void dump_info(struct ir3_shader_variant *so, const char *str)
 {
        uint32_t *bin;
-       const char *type = ir3_shader_stage(so->shader);
+       const char *type = ir3_shader_stage(so);
        bin = ir3_shader_assemble(so, so->shader->compiler->gpu_id);
        debug_printf("; %s: %s\n", type, str);
        ir3_shader_disasm(so, bin, stdout);
index e5ea424b221dca28c2d0822b001678c8d77f5202..9fad7446080300e7cb7e4e7aeab1f95a287ea264 100644 (file)
@@ -51,11 +51,10 @@ dump_shader_info(struct ir3_shader_variant *v, bool binning_pass,
                return;
 
        pipe_debug_message(debug, SHADER_INFO,
-                       "%s%s shader: %u inst, %u dwords, "
+                       "%s shader: %u inst, %u dwords, "
                        "%u half, %u full, %u constlen, "
                        "%u (ss), %u (sy), %d max_sun, %d loops\n",
-                       binning_pass ? "B" : "",
-                       ir3_shader_stage(v->shader),
+                       ir3_shader_stage(v),
                        v->info.instrs_count,
                        v->info.sizedwords,
                        v->info.max_half_reg + 1,