i965: Get rid of backend_instruction::sampler

The generators no longer use this.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
index acaf92b0fe2c12ae99d11eca4340c1e3163efe4e..5a485df55e6d30d4c8f7180ca76ac3efa830eeed 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
@@ -83,7 +83,6 @@ brw_blorp_eu_emitter::emit_texture_lookup(const struct brw_reg &dst,
 
    inst->base_mrf = base_mrf;
    inst->mlen = msg_length;
-   inst->sampler = 0;
    inst->header_present = false;
 
    insts.push_tail(inst);

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 13ef6dde6de2970f23ce3691afc5e17311876f14..bf95b57f91aaf82c985576b3ede371cfeafb1237 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -348,7 +348,6 @@ fs_inst::equals(fs_inst *inst) const
            conditional_mod == inst->conditional_mod &&
            mlen == inst->mlen &&
            base_mrf == inst->base_mrf &&
-           sampler == inst->sampler &&
            target == inst->target &&
            eot == inst->eot &&
            header_present == inst->header_present &&

diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
index 63d87f942f3ffdf0c6e951a65c8af47672d33473..01790ada8b493a2837717b0e6c418a79a47f7fd6 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
@@ -157,7 +157,6 @@ instructions_match(fs_inst *a, fs_inst *b)
                           a->mlen == b->mlen &&
                           a->regs_written == b->regs_written &&
                           a->base_mrf == b->base_mrf &&
-                          a->sampler == b->sampler &&
                           a->eot == b->eot &&
                           a->header_present == b->header_present &&
                           a->shadow_compare == b->shadow_compare)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
index 35c056fad669d224b1e286d7d1a52c728e992026..8d07be2ee1732c62558c88813b6d727e3e4b08ea 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
@@ -498,7 +498,6 @@ fs_visitor::emit_fragment_program_code()
             inst = emit_texture_gen4(ir, dst, coordinate, shadow_c, lod, dpdy, fpi->TexSrcUnit);
          }
 
-         inst->sampler = fpi->TexSrcUnit;
          inst->shadow_compare = fpi->TexShadow;
 
          /* Reuse the GLSL swizzle_result() handler. */

diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 534c65261d67b1644b4228c8226f1cfa7e8e0c2f..4701e61e14a77e5cf2c75b9cae1b2f7454396a2c 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -1745,7 +1745,6 @@ fs_visitor::emit_mcs_fetch(ir_texture *ir, fs_reg coordinate, uint32_t sampler)
    inst->regs_written = 4; /* we only care about one reg of response,
                             * but the sampler always writes 4/8
                             */
-   inst->sampler = sampler;
 
    return dest;
 }
@@ -1867,8 +1866,6 @@ fs_visitor::visit(ir_texture *ir)
    if (ir->op == ir_tg4)
       inst->texture_offset |= gather_channel(ir, sampler) << 16; // M0.2:16-17
 
-   inst->sampler = sampler;
-
    if (ir->shadow_comparitor)
       inst->shadow_compare = true;
 

diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 5c48671ff6d45c1b50d54fbd10e59d5771c24da5..5980cf0cd688a5e3caad9aa53ea360256f283980 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -108,7 +108,6 @@ struct backend_instruction {
 
    uint32_t texture_offset; /**< Texture offset bitfield */
    uint32_t offset; /**< spill/unspill offset */
-   uint8_t sampler;
    uint8_t mlen; /**< SEND message length */
    int8_t base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
    uint8_t target; /**< MRT target. */

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index a47c3a6e96d39a6c9984b86a412f21143fdd7282..1b46850261644e619559161d8033a19351a9defb 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -45,7 +45,6 @@ vec4_instruction::vec4_instruction(vec4_visitor *v,
    this->no_dd_check = false;
    this->writes_accumulator = false;
    this->conditional_mod = BRW_CONDITIONAL_NONE;
-   this->sampler = 0;
    this->texture_offset = 0;
    this->target = 0;
    this->shadow_compare = false;
@@ -2282,7 +2281,6 @@ vec4_visitor::emit_mcs_fetch(ir_texture *ir, src_reg coordinate, uint32_t sample
    vec4_instruction *inst = new(mem_ctx) vec4_instruction(this, SHADER_OPCODE_TXF_MCS);
    inst->base_mrf = 2;
    inst->mlen = 1;
-   inst->sampler = sampler;
    inst->dst = dst_reg(this, glsl_type::uvec4_type);
    inst->dst.writemask = WRITEMASK_XYZW;
 
@@ -2434,7 +2432,6 @@ vec4_visitor::visit(ir_texture *ir)
       sampler >= 16;
    inst->base_mrf = 2;
    inst->mlen = inst->header_present + 1; /* always at least one */
-   inst->sampler = sampler;
    inst->dst = dst_reg(this, ir->type);
    inst->dst.writemask = WRITEMASK_XYZW;
    inst->shadow_compare = ir->shadow_comparitor != NULL;