dev-arm: Remove un-needed Q_CONS_PROD_MASK macro
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Mon, 24 Jun 2019 15:31:08 +0000 (16:31 +0100)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Wed, 26 Jun 2019 11:58:55 +0000 (11:58 +0000)
Change-Id: I858d7eea088bbdd2dc12123e21e59991c896597f
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Michiel Van Tol <michiel.vantol@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19310
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/dev/arm/smmu_v3_cmdexec.cc
src/dev/arm/smmu_v3_defs.hh
src/dev/arm/smmu_v3_transl.cc

index 494c86798b7f93e4e929c411d01ab0f9d658b627..48896bf966199fa9a7fac0ef6436d3059d596319 100644 (file)
@@ -56,8 +56,7 @@ SMMUCommandExecProcess::main(Yield &yield)
         busy = true;
 
         while (true) {
-            int sizeMask =
-                mask(smmu.regs.cmdq_base & Q_BASE_SIZE_MASK) & Q_CONS_PROD_MASK;
+            int sizeMask = mask(smmu.regs.cmdq_base & Q_BASE_SIZE_MASK);
 
             if ((smmu.regs.cmdq_cons & sizeMask) ==
                     (smmu.regs.cmdq_prod & sizeMask))
index f74f8190a1214e8458bc08558cf9aa94eaf64f91..2070e1d90f0473da2dc2ff0e141fe99de269351b 100644 (file)
@@ -92,7 +92,6 @@ enum {
     VMT_BASE_ADDR_MASK = 0x0000ffffffffffe0ULL,
     VMT_BASE_SIZE_MASK = 0x000000000000001fULL,
 
-    Q_CONS_PROD_MASK   = 0x00000000000fffffULL,
     Q_BASE_ADDR_MASK   = 0x0000ffffffffffe0ULL,
     Q_BASE_SIZE_MASK   = 0x000000000000001fULL,
 
index f1e1fb11fba940aaef0c2d90bb746626d1997b7f..c1a7ed1d305b78fcc0fa000e89d285082518046e 100644 (file)
@@ -1280,8 +1280,7 @@ SMMUTranslationProcess::completePrefetch(Yield &yield)
 void
 SMMUTranslationProcess::sendEvent(Yield &yield, const SMMUEvent &ev)
 {
-    int sizeMask = mask(smmu.regs.eventq_base & Q_BASE_SIZE_MASK) &
-            Q_CONS_PROD_MASK;
+    int sizeMask = mask(smmu.regs.eventq_base & Q_BASE_SIZE_MASK);
 
     if (((smmu.regs.eventq_prod+1) & sizeMask) ==
             (smmu.regs.eventq_cons & sizeMask))