(no commit message)

diff --git a/openpower/sv/major_opcode_allocation.mdwn b/openpower/sv/major_opcode_allocation.mdwn
index 3c551fd9fac6b2a4d471ad69ca23e3b89f2453b7..2dc253b8cb1a6718c0148c637281444aae6422d5 100644 (file)
--- a/openpower/sv/major_opcode_allocation.mdwn
+++ b/openpower/sv/major_opcode_allocation.mdwn
@@ -51,10 +51,9 @@ Potential ways to reduce pressure on the 16 bit space are:
 
 This latter would be useful in the Vector context to have an alternative meaning: as the bit which determines whether the instruction is 11-bit prefixed or 27-bit prefixed:
 
-'''
-0 1 2 3 4 5 6 7 8 9 a b c d e f |
-|major op | 11 bit vector prefix|
-|16 bit opcode  alt vec. mode ^ |
-| extra vector prefix if alt set|
-'''
+    0 1 2 3 4 5 6 7 8 9 a b c d e f |
+    |major op | 11 bit vector prefix|
+    |16 bit opcode  alt vec. mode ^ |
+    | extra vector prefix if alt set|
+