tests: update reference config.ini files for previous cset
authorSteve Reinhardt <steve.reinhardt@amd.com>
Tue, 17 Aug 2010 12:06:22 +0000 (05:06 -0700)
committerSteve Reinhardt <steve.reinhardt@amd.com>
Tue, 17 Aug 2010 12:06:22 +0000 (05:06 -0700)
Rename 'responder_set' to 'use_default_range'.

94 files changed:
tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini
tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.ini
tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini
tests/long/00.gzip/ref/arm/linux/simple-atomic/config.ini
tests/long/00.gzip/ref/arm/linux/simple-timing/config.ini
tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini
tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini
tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini
tests/long/00.gzip/ref/x86/linux/simple-atomic/config.ini
tests/long/00.gzip/ref/x86/linux/simple-timing/config.ini
tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini
tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini
tests/long/10.mcf/ref/arm/linux/simple-atomic/config.ini
tests/long/10.mcf/ref/arm/linux/simple-timing/config.ini
tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini
tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini
tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini
tests/long/10.mcf/ref/x86/linux/simple-timing/config.ini
tests/long/20.parser/ref/arm/linux/simple-atomic/config.ini
tests/long/20.parser/ref/arm/linux/simple-timing/config.ini
tests/long/20.parser/ref/x86/linux/simple-atomic/config.ini
tests/long/20.parser/ref/x86/linux/simple-timing/config.ini
tests/long/30.eon/ref/alpha/tru64/o3-timing/config.ini
tests/long/30.eon/ref/alpha/tru64/simple-atomic/config.ini
tests/long/30.eon/ref/alpha/tru64/simple-timing/config.ini
tests/long/30.eon/ref/arm/linux/simple-atomic/config.ini
tests/long/30.eon/ref/arm/linux/simple-timing/config.ini
tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini
tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini
tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini
tests/long/40.perlbmk/ref/arm/linux/simple-atomic/config.ini
tests/long/40.perlbmk/ref/arm/linux/simple-timing/config.ini
tests/long/50.vortex/ref/alpha/tru64/inorder-timing/config.ini
tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini
tests/long/50.vortex/ref/alpha/tru64/simple-atomic/config.ini
tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini
tests/long/50.vortex/ref/arm/linux/simple-atomic/config.ini
tests/long/50.vortex/ref/arm/linux/simple-timing/config.ini
tests/long/50.vortex/ref/sparc/linux/simple-atomic/config.ini
tests/long/50.vortex/ref/sparc/linux/simple-timing/config.ini
tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini
tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini
tests/long/60.bzip2/ref/alpha/tru64/simple-timing/config.ini
tests/long/60.bzip2/ref/arm/linux/simple-atomic/config.ini
tests/long/60.bzip2/ref/arm/linux/simple-timing/config.ini
tests/long/60.bzip2/ref/x86/linux/simple-atomic/config.ini
tests/long/60.bzip2/ref/x86/linux/simple-timing/config.ini
tests/long/70.twolf/ref/alpha/tru64/inorder-timing/config.ini
tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini
tests/long/70.twolf/ref/alpha/tru64/simple-atomic/config.ini
tests/long/70.twolf/ref/alpha/tru64/simple-timing/config.ini
tests/long/70.twolf/ref/arm/linux/simple-atomic/config.ini
tests/long/70.twolf/ref/arm/linux/simple-timing/config.ini
tests/long/70.twolf/ref/sparc/linux/simple-atomic/config.ini
tests/long/70.twolf/ref/sparc/linux/simple-timing/config.ini
tests/long/70.twolf/ref/x86/linux/simple-atomic/config.ini
tests/long/70.twolf/ref/x86/linux/simple-timing/config.ini
tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini
tests/quick/00.hello/ref/alpha/linux/inorder-timing/config.ini
tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini
tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini
tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini
tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini
tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini
tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini
tests/quick/00.hello/ref/arm/linux/simple-atomic/config.ini
tests/quick/00.hello/ref/mips/linux/inorder-timing/config.ini
tests/quick/00.hello/ref/mips/linux/o3-timing/config.ini
tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini
tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini
tests/quick/00.hello/ref/power/linux/o3-timing/config.ini
tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini
tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.ini
tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini
tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini
tests/quick/00.hello/ref/x86/linux/simple-timing/config.ini
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini
tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini
tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini
tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini
tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/config.ini
tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini
tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini
tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini
tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/config.ini
tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini
tests/quick/50.memtest/ref/alpha/linux/memtest/config.ini
tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini

index 80a3274df2eabb1d375cef67fa5f81bc39b66215..787ff8db09443b514ffa40390140711d88526b1b 100644 (file)
@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index d1818975e1a344f89853398b5a12405ab9b38e2b..a3ffddd7951a9ad8afc0c154bbd6a1b8a90b1c95 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 812afa4996ff928ca82ff08485ca738d6b27d28a..fdd3515e502d8d933eebec9b02f628966b3b94e6 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 5226b78e6629197d1d3d780e236b01b20009760b..1d231bcbc0f496a284c99cec2f1abae7e6b7a902 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index c729d14748e97286fc40accc0929a2ef67582bd0..86b7d82faa10e2814db7f836c67047ecc79ea6a9 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 7751f11d1087f349cc2a2f7a1358a42f55e5712f..c00f7a5142c848ac833d449194add5eac14f2590 100644 (file)
@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 724bab0325ae22ef279511195e4c6321e4a926db..25252561e54d1d68db78b56b1f0fdb341f160c16 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 4f8cbe2e963685d823cc56c292c454e1436d2c07..44b6cba588f6f51847b95d06a28b6777ddaa14a1 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 8edc68d8c6f2642db6ce2273eded2cbc099e6992..d9eef78558b9b64739ef5f6412d30a3c8fc65deb 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index bf0f0affa4da2b8b18335e04f762ac9b10ad7592..78cac28fc6aaefd7bd8f30acdfacd92cf63ae5d2 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 636d3e4ceb6f5152abcebb86b1751167b0e66186..460e84f55600642bf24c1371d5f834775c4fb1da 100644 (file)
@@ -693,7 +693,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=true
+use_default_range=true
 width=64
 default=system.tsunami.pciconfig.pio
 port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
@@ -767,7 +767,7 @@ block_size=64
 bus_id=1
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 default=system.membus.badaddr_responder.pio
 port=system.bridge.side_b system.physmem.port[0] system.iocache.mem_side system.l2c.mem_side
@@ -822,7 +822,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
 
index 3fe2f1fccb614a5cb53c301c51a40981501675b6..0258575665e9dc92c27ded63a8df84ca86febfd2 100644 (file)
@@ -388,7 +388,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=true
+use_default_range=true
 width=64
 default=system.tsunami.pciconfig.pio
 port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
@@ -462,7 +462,7 @@ block_size=64
 bus_id=1
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 default=system.membus.badaddr_responder.pio
 port=system.bridge.side_b system.physmem.port[0] system.iocache.mem_side system.l2c.mem_side
@@ -517,7 +517,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu.icache.mem_side system.cpu.dcache.mem_side
 
index 51e7307136377d888984e1107392605a921a5553..0209f556bfc4210ad06f1645b4d8cdd4953d5c55 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 7b31977b84145969f6233c80f8281fa82ba6c9ce..c9498a09bdfea74c2a5d2aaee2aa22ad3890fbb9 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index d56440ca5792b692c9a8068dd5e765f08328c76c..06fed5d59fb1ec5f7f3229bff3e477982c9f4e77 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index b6cfae7177c3ffd7ee30e4fa6446712febd60972..4adb0acbfa97181f12454379623577e761f81f13 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 75f4bc2575441926e933f1f2ff9f3f1211b2f4c2..b196f98afa04f4b5648ba291a9532655cb532a3c 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index b70c08a858306b369c3e3b48c712d0d655c500a0..de79d221cfe0967ddcd89dd2db5a56d009f00d0d 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index e9a6bfef4130221c2e17d1a2c92134ce28758332..630b83a8c1ccaca0ad82e2f17843977ab5f6339a 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 7672e80152994545aa0456f77a89a91c948e7554..31d1c564f6ae489abcaf9eaa22e4e0d3abc5a77e 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 5b5021caec47102b04b75171a92c6be75ec069eb..ffb950a5fcad6a2ded72e4434ab6964dfcac1a09 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index aed4ce8e73ae3f48a24e8a6edba48805477b53fa..7ded9366570876374ad1005a57c0cda572644a82 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index c1d630de3a5681c4a87faa918de2707176cac797..554104cdc54351a2b8a1f15d899164c59c118ab1 100644 (file)
@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index c17ad3a4314c2dc7287af19bf705415cc5a688fd..07bd8a6ece39ba769a1fa2c8f1f2a16a45f75709 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 9f3658fe3715fb17156a0001d9a115280085b452..9a8f7190d50de812d842867e2e031aa9ebc9f8c2 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 0f7678eb41069c6e38a44ab2cc840ab437e6aaeb..0795e438f7d8b2bcab9b877cbdfba4433f8bbed8 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 3e8fe5eab814b6c0467803d9c481f93db8695c56..09f490b9e229a058713e55f2e239f1d1ec459ce2 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index cbeb23be816fc89c161450a626105a9db24e8c47..de6fddf57132b4bac65c45ea3537a81e3b8f5a46 100644 (file)
@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 09e561461d4d7123bdc085c6dd53558d2395ba45..883c784afbed6b4b1ca46fc8cae1ec30dee20bea 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 8af60fc8ae607a546bd24d2b0673a52899d4c351..f34fd0520c4d5739f39cfe9472f38ff78d3c79c8 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 3428438b6d5e0399b413828f1065524e765eeea2..b50012ecd4d5d08020c8ef1aaad375e3f466dc25 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 406381ed3220524955069081aa3802a60af40db2..0c2974d0d290c14e19607694ed4576f65531270d 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 8c56dc5130f9b135e2be668fbd1a3b7405b423aa..266b0ffd5efa4defe64d2cada14fcf3f8f4cf857 100644 (file)
@@ -176,7 +176,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -208,7 +208,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 978c677a5f94e11dfe3d7014208809729484a2aa..58500b489b3a582b2b3ce59b289fb6540e4618c7 100644 (file)
@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 4900adf7c815cf87aeec5434fa14b5e0bb1f7dd0..5e3f68d809d7d4e488787eb4890d17ae86e1aaf6 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 8ecb2b7e978214d53948123c576b261959d9fd2a..436162c6841d9a519e4c41fa67da56035197228d 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index f312b762ae9644ea178389957a40e5444d2eb7b3..917f453989ed90b1db3ecdc52821828afdb702de 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 13918f4b6265cfa0c148573bc2570c54557c32ca..c968b9735ae9d647df4abb807b24c5457ff1d1fe 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index f7d6c90f78d16261453ed4555b2c1a0119c31aef..51965dbb51c4b1f3df65130ef754070883b13396 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index ace2091d8b8a5a887d3e357bf0e9a868c3ea85ec..8638f57718bb9c6648162ec5beee2bdba72afe59 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index d68c494ddcfa51703ce2d5f9058a795c66395289..8d8bb9386cdd47c0c36e3121a2cceeee71b0bb5b 100644 (file)
@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 8eb2ad76d265b9082db6d5a50077662a85b037fd..740b113f40fcaba398fe4ff3b7f77fe2739e6aec 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index dc20618d986c3ed100b10f8fafbf27a338b2ea63..731ef059fcc0f5cdd9e1fa427e8609d772cd657e 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 33c0bcdab93dbc965fbeb0926cea2e1e45e88b80..94974c5b8f2fdb1311bd02a1ec5a424b210e8fe3 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 91f361a3eba37263d9360e4980b40b773c941924..a691429150c49df5de31c67e046ace5f3fa9e1e8 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 8cd09b7fa844fb7c5304555dc22ed48e71717cb3..eb58c93af39169cc1f68f6b51d0ce12ace39e683 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 9d193ac5e8b73eea5859a0184ec98b57acbd9b5d..da4c21650ac785ff0904bbda23d9a14a318fa21a 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 4db62954fcb71d545c4d50377610be1188c8cf8e..86946de65a9ee9fc9abbd9516fe1ce4eb8ec6144 100644 (file)
@@ -176,7 +176,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -208,7 +208,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 0b7fa96563ec17aff18b2ba559a03bdbf8eb6011..c80e576a246d7db84a54c85e22ca8cd8c9b52bac 100644 (file)
@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index fb69f21479e0a385bd102252c48c286e3aa274d8..f43997d9da2c3876f95c6d47a389062375ac1a47 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 2e720b950cc846f17b3f629b35d44b26671e54e1..408aa067d4b19a3b44b6291aad7778edcaded5dc 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 728db8d08fd7bd94eb4bf7f5a459f4a74887771e..e74513b7ae4942851f4c061111db4189546316d9 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 60aa011778cf7f6b9c962820c64c98dbc2e9173c..4b18512b5f8b261f7a93667bc8e7aa4b6cdaaf66 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 4873f314be888abac6061a44cc2bd8696e75a43f..1b0da48ab692b432f3ffaf5bc1e6dc90d616d58a 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index fb6af19fc61f3eb41813b08e45dad0510893a712..1d3f0204ac3943e3cdee5ef90959c07db7d64a93 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index e88047c7b43eb1e697f7bb864824bc8ea280eed9..1d7a06b34a93ddc4b4b7187022c7868e09f65719 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index af2b899e66ebd0bab2fd85ea86fcc20a80935204..06c7e5e676db8a98a7fe52072a96b373476ba658 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 4c20f32d0316eee32cee77ac5a41b8489ad06dd4..41396e67d3c0b92ed8daf92f64cc5736606af89b 100644 (file)
@@ -133,7 +133,7 @@ block_size=64
 bus_id=0
 clock=2
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.t1000.fake_clk.pio system.t1000.fake_membnks.pio system.t1000.fake_l2_1.pio system.t1000.fake_l2_2.pio system.t1000.fake_l2_3.pio system.t1000.fake_l2_4.pio system.t1000.fake_l2esr_1.pio system.t1000.fake_l2esr_2.pio system.t1000.fake_l2esr_3.pio system.t1000.fake_l2esr_4.pio system.t1000.fake_ssi.pio system.t1000.fake_jbi.pio system.t1000.puart0.pio system.t1000.hvuart.pio system.bridge.side_a system.disk0.pio
 
@@ -144,7 +144,7 @@ block_size=64
 bus_id=1
 clock=2
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 default=system.membus.badaddr_responder.pio
 port=system.t1000.iob.pio system.t1000.htod.pio system.bridge.side_b system.physmem.port[0] system.physmem2.port[0] system.rom.port[0] system.nvram.port[0] system.hypervisor_desc.port[0] system.partition_desc.port[0] system.cpu.icache_port system.cpu.dcache_port
index 474a0cfef62d3fae781ff04e4d9b2668254756a8..f516c45fc3de4043d84f455bb7df0adb73988dab 100644 (file)
@@ -176,7 +176,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -208,7 +208,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 409d22ab88b9bf945cbd8c53151ee7aeb75f314e..173f18915ef5ed288c5f3ac902241ff2e8f8a4dd 100644 (file)
@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index a69256420e15279800da2f1453e806df075b16f6..d867b793e62edb53844fd92ce236f3012bd15fb3 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 9b07b770c8e96db4fe95dfb853bdb8f7a2164401..b9c9ec747b773fc5020b5531ba4ee5e37bf7658f 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 73089a2aac6121c20b143d003cd037b98db1d636..9f8bdfba930f6a70c138e0b7b1f07917c9a536fc 100644 (file)
@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index c65c23354edc99e59cb575f501e46708a4fdbe2c..e4650467f231d91150caa405323f409656fb489a 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index f316dec65f4616594834cf1fbc146f226774f2de..ab47c5c67aad74e7fc660210f68377ccdc099edf 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 70fb598b9e6beec27e3db5488e8dd9be8302e5d1..e0fa83d1c994215475ba4f93654aa16a6626146a 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 0aa4f38a5c53e7120941998d391bc7e3e9725eec..8312243a44fcc7b669dd70c5b41787deef226f5c 100644 (file)
@@ -230,7 +230,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -262,7 +262,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index a56ef06674d128cfc82498f29b1e67e03e90016d..3aa7b893fae2de8d87057c4487ba2a9cd9970070 100644 (file)
@@ -397,7 +397,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -429,7 +429,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 0e0904624ebc76c36ac678f0e8f8aaec04bf405d..6242699da26d40c155780b3126e526cf870c3815 100644 (file)
@@ -128,7 +128,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index aecf3d2c528ef363295ff1fc786145677054ccdf..b041890600596aecaff5355372106c40c6bbc467 100644 (file)
@@ -196,7 +196,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -228,7 +228,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 5fbc0ed64d4f91a71cf0977b0fc99562eafb8b95..e69547764ccea4f1aaa54d2e35cb603d2a862c31 100644 (file)
@@ -344,7 +344,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -376,7 +376,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 930fa65ed86d2020eee7cadf59316da03707e840..1ef6f51da09c3046725d5c100dec040ad47d661c 100644 (file)
@@ -75,7 +75,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 7b5adc160f81190cfe6b920cb69768a9d71b3bd7..de14f79c74c7b25d2d617a969ee0317e0481cd79 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 8f9e543cc7e9bc8497f9c1cf1703f9283749cfaa..d91ebcc59090352ec784f6e0d83ef5091c0fce74 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 911046b978b78f5ccf30b4c7b57023d3922bcc1c..99edb8037a7e500705eaaa169fed683357f8474e 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index db5e719f3fc2714d2feb600dd05405312ce8fbe9..2d6c6d0acce7c8f14cd122c541c1c0879255956b 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 5b9e4a123312181e35f35b5c44cbb90bc8ce444b..808784ec17cd311a54a2f6b8ff6252f042ae0525 100644 (file)
@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -394,7 +394,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 927a68251e83b2fa4a50e7721017c2b33282f1ac..f82b3de59f062ad9cc1d2389fafd89a0e21e8db7 100644 (file)
@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index 0d783c1db61e89fdaf10f3efda68283415d97bb9..91a9c57a5a94631e08d1ed61b7f155e6b99c50d5 100644 (file)
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index 777caa1731ac8f71b49b806537f4cce004a61f40..29f855cba90b19215d2c4bc7fb7905bb5b1de985 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index decabad7f461e928fdf84a31e6323623cc58df50..7292b0c1afcda12065e2a21cb4576e132c25c6e7 100644 (file)
@@ -297,7 +297,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=true
+use_default_range=true
 width=64
 default=system.tsunami.pciconfig.pio
 port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
@@ -371,7 +371,7 @@ block_size=64
 bus_id=1
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 default=system.membus.badaddr_responder.pio
 port=system.bridge.side_b system.physmem.port[0] system.iocache.mem_side system.l2c.mem_side
@@ -426,7 +426,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
 
index 372087060a04e74120d5576d854c7a515826831f..c4ecb27ec8d68360a01b5e120239acb95fbee8b4 100644 (file)
@@ -190,7 +190,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=true
+use_default_range=true
 width=64
 default=system.tsunami.pciconfig.pio
 port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
@@ -264,7 +264,7 @@ block_size=64
 bus_id=1
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 default=system.membus.badaddr_responder.pio
 port=system.bridge.side_b system.physmem.port[0] system.iocache.mem_side system.l2c.mem_side
@@ -319,7 +319,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu.icache.mem_side system.cpu.dcache.mem_side
 
index 004d84e5f86496683016a327472e976886bf3ccf..d4b4f018c75db1ef5886d9550db1379eb0e49347 100644 (file)
@@ -291,7 +291,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=true
+use_default_range=true
 width=64
 default=system.tsunami.pciconfig.pio
 port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
@@ -365,7 +365,7 @@ block_size=64
 bus_id=1
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 default=system.membus.badaddr_responder.pio
 port=system.bridge.side_b system.physmem.port[0] system.iocache.mem_side system.l2c.mem_side
@@ -420,7 +420,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
 
index 96d83e36f338d1b8d57b0622f2bcdc4ce4d8b77b..38041459e818931cf8e21c650a7cfa278178dba1 100644 (file)
@@ -187,7 +187,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=true
+use_default_range=true
 width=64
 default=system.tsunami.pciconfig.pio
 port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
@@ -261,7 +261,7 @@ block_size=64
 bus_id=1
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 default=system.membus.badaddr_responder.pio
 port=system.bridge.side_b system.physmem.port[0] system.iocache.mem_side system.l2c.mem_side
@@ -316,7 +316,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu.icache.mem_side system.cpu.dcache.mem_side
 
index ea5856bb6f6a8acdca25f582c17522b3e56a5774..e9881bcfa7bb266094ed29693214bebc48fd7b27 100644 (file)
@@ -65,7 +65,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
index f1b56a9bd48bb97acaf751bbe91da7515ca08578..f8aa4e39a2123869961f190e41e678a4af45b565 100644 (file)
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -165,7 +165,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
index a6af5d88007ebc76871b6b7202e633b50663f740..0a51ea28f7bd5520740efca1fe21414ba523219b 100644 (file)
@@ -494,7 +494,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.mem_side system.physmem.port[0]
 
@@ -514,7 +514,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
 
index 29d69ea29538b3f53844c84dc5fe8f98e359c53c..786aa64a88049ff4f49981dfa45b5782796a282b 100644 (file)
@@ -482,7 +482,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.mem_side system.physmem.port[0]
 
@@ -502,7 +502,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
 
index e7279bca8a97617130e224d99dd1c553e1343512..c3c2d2e0e0ecc4b8dbcd5443fd565d32a6e6eb00 100644 (file)
@@ -1265,7 +1265,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.mem_side system.physmem.port[0]
 
@@ -1285,7 +1285,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
 
index fb5bbcb94fdcd3d4712d04e7150da2d517a37188..a92224734bdec325427d66d1e55bcbbe6e45963c 100644 (file)
@@ -473,7 +473,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.mem_side system.physmem.port[0]
 
@@ -493,7 +493,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
 
index bbd5c6af73d3928440a2ded014fcaf7947edfa1e..a2a28909c6ab478036a93c090d3c1116126ab3cb 100644 (file)
@@ -182,7 +182,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu0.icache_port system.cpu0.dcache_port system.cpu1.icache_port system.cpu1.dcache_port system.cpu2.icache_port system.cpu2.dcache_port system.cpu3.icache_port system.cpu3.dcache_port system.physmem.port[0]
 
index f3434ec9bc0659f3be6027c392dce97744ab86e7..ca866c92572c77aa092e3aaa921cf9227a368806 100644 (file)
@@ -461,7 +461,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.mem_side system.physmem.port[0]
 
@@ -481,7 +481,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
 
index bebc4169cb19bc6a7216f4fc8f415b8666a9e2aa..4072a18fea6b49499b93a4847c7b3fd527d2d5a6 100644 (file)
@@ -432,7 +432,7 @@ block_size=64
 bus_id=0
 clock=2
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=16
 port=system.l2c.mem_side system.physmem.port[0]
 
@@ -452,7 +452,7 @@ block_size=64
 bus_id=0
 clock=2
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=16
 port=system.l2c.cpu_side system.cpu0.l1c.mem_side system.cpu1.l1c.mem_side system.cpu2.l1c.mem_side system.cpu3.l1c.mem_side system.cpu4.l1c.mem_side system.cpu5.l1c.mem_side system.cpu6.l1c.mem_side system.cpu7.l1c.mem_side
 
index f9d319b05b519772d273db79afa19222392631f4..5e988f0dd4e8849856eb80c80804c62c82dc64f7 100644 (file)
@@ -128,7 +128,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=true
+use_default_range=true
 width=64
 default=drivesys.tsunami.pciconfig.pio
 port=drivesys.bridge.side_a drivesys.tsunami.cchip.pio drivesys.tsunami.pchip.pio drivesys.tsunami.fake_sm_chip.pio drivesys.tsunami.fake_uart1.pio drivesys.tsunami.fake_uart2.pio drivesys.tsunami.fake_uart3.pio drivesys.tsunami.fake_uart4.pio drivesys.tsunami.fake_ppc.pio drivesys.tsunami.fake_OROM.pio drivesys.tsunami.fake_pnp_addr.pio drivesys.tsunami.fake_pnp_write.pio drivesys.tsunami.fake_pnp_read0.pio drivesys.tsunami.fake_pnp_read1.pio drivesys.tsunami.fake_pnp_read2.pio drivesys.tsunami.fake_pnp_read3.pio drivesys.tsunami.fake_pnp_read4.pio drivesys.tsunami.fake_pnp_read5.pio drivesys.tsunami.fake_pnp_read6.pio drivesys.tsunami.fake_pnp_read7.pio drivesys.tsunami.fake_ata0.pio drivesys.tsunami.fake_ata1.pio drivesys.tsunami.fb.pio drivesys.tsunami.io.pio drivesys.tsunami.uart.pio drivesys.tsunami.backdoor.pio drivesys.tsunami.ide.pio drivesys.tsunami.ethernet.pio drivesys.tsunami.ethernet.config drivesys.tsunami.ethernet.dma drivesys.tsunami.ide.config drivesys.tsunami.ide.dma
@@ -140,7 +140,7 @@ block_size=64
 bus_id=1
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 default=drivesys.membus.badaddr_responder.pio
 port=drivesys.bridge.side_b drivesys.physmem.port[0] drivesys.cpu.icache_port drivesys.cpu.dcache_port
@@ -832,7 +832,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=true
+use_default_range=true
 width=64
 default=testsys.tsunami.pciconfig.pio
 port=testsys.bridge.side_a testsys.tsunami.cchip.pio testsys.tsunami.pchip.pio testsys.tsunami.fake_sm_chip.pio testsys.tsunami.fake_uart1.pio testsys.tsunami.fake_uart2.pio testsys.tsunami.fake_uart3.pio testsys.tsunami.fake_uart4.pio testsys.tsunami.fake_ppc.pio testsys.tsunami.fake_OROM.pio testsys.tsunami.fake_pnp_addr.pio testsys.tsunami.fake_pnp_write.pio testsys.tsunami.fake_pnp_read0.pio testsys.tsunami.fake_pnp_read1.pio testsys.tsunami.fake_pnp_read2.pio testsys.tsunami.fake_pnp_read3.pio testsys.tsunami.fake_pnp_read4.pio testsys.tsunami.fake_pnp_read5.pio testsys.tsunami.fake_pnp_read6.pio testsys.tsunami.fake_pnp_read7.pio testsys.tsunami.fake_ata0.pio testsys.tsunami.fake_ata1.pio testsys.tsunami.fb.pio testsys.tsunami.io.pio testsys.tsunami.uart.pio testsys.tsunami.backdoor.pio testsys.tsunami.ide.pio testsys.tsunami.ethernet.pio testsys.tsunami.ethernet.config testsys.tsunami.ethernet.dma testsys.tsunami.ide.config testsys.tsunami.ide.dma
@@ -844,7 +844,7 @@ block_size=64
 bus_id=1
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 default=testsys.membus.badaddr_responder.pio
 port=testsys.bridge.side_b testsys.physmem.port[0] testsys.cpu.icache_port testsys.cpu.dcache_port