mem-garnet: Use static allocation in InputUnit

Use static allocation for the pointers managed by InputUnit.

Change-Id: I3eab42c6c08b1a519b9b55de26e820bad2ef03c4
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24245
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/mem/ruby/network/garnet2.0/InputUnit.cc b/src/mem/ruby/network/garnet2.0/InputUnit.cc
index ae381b9f249c2d764fb6a1a41df4bf7e1d2823bb..8fdce067b9e36bba11f6aa192d920ae42fbe4eaf 100644 (file)
--- a/src/mem/ruby/network/garnet2.0/InputUnit.cc
+++ b/src/mem/ruby/network/garnet2.0/InputUnit.cc
@@ -1,6 +1,7 @@
 /*
- * Copyright (c) 2008 Princeton University
+ * Copyright (c) 2020 Inria
  * Copyright (c) 2016 Georgia Institute of Technology
+ * Copyright (c) 2008 Princeton University
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -30,23 +31,17 @@
 
 #include "mem/ruby/network/garnet2.0/InputUnit.hh"
 
-#include "base/stl_helpers.hh"
 #include "debug/RubyNetwork.hh"
 #include "mem/ruby/network/garnet2.0/Credit.hh"
 #include "mem/ruby/network/garnet2.0/Router.hh"
 
 using namespace std;
-using m5::stl_helpers::deletePointers;
 
 InputUnit::InputUnit(int id, PortDirection direction, Router *router)
-            : Consumer(router)
+  : Consumer(router), m_router(router), m_id(id), m_direction(direction),
+    m_vc_per_vnet(m_router->get_vc_per_vnet())
 {
-    m_id = id;
-    m_direction = direction;
-    m_router = router;
-    m_num_vcs = m_router->get_num_vcs();
-    m_vc_per_vnet = m_router->get_vc_per_vnet();
-
+    const int m_num_vcs = m_router->get_num_vcs();
     m_num_buffer_reads.resize(m_num_vcs/m_vc_per_vnet);
     m_num_buffer_writes.resize(m_num_vcs/m_vc_per_vnet);
     for (int i = 0; i < m_num_buffer_reads.size(); i++) {
@@ -54,20 +49,13 @@ InputUnit::InputUnit(int id, PortDirection direction, Router *router)
         m_num_buffer_writes[i] = 0;
     }
 
-    creditQueue = new flitBuffer();
     // Instantiating the virtual channels
-    m_vcs.resize(m_num_vcs);
+    virtualChannels.reserve(m_num_vcs);
     for (int i=0; i < m_num_vcs; i++) {
-        m_vcs[i] = new VirtualChannel(i);
+        virtualChannels.emplace_back(i);
     }
 }
 
-InputUnit::~InputUnit()
-{
-    delete creditQueue;
-    deletePointers(m_vcs);
-}
-
 /*
  * The InputUnit wakeup function reads the input flit from its input link.
  * Each flit arrives with an input VC.
@@ -91,7 +79,7 @@ InputUnit::wakeup()
         if ((t_flit->get_type() == HEAD_) ||
             (t_flit->get_type() == HEAD_TAIL_)) {
 
-            assert(m_vcs[vc]->get_state() == IDLE_);
+            assert(virtualChannels[vc].get_state() == IDLE_);
             set_vc_active(vc, m_router->curCycle());
 
             // Route computation for this vc
@@ -104,12 +92,12 @@ InputUnit::wakeup()
             grant_outport(vc, outport);
 
         } else {
-            assert(m_vcs[vc]->get_state() == ACTIVE_);
+            assert(virtualChannels[vc].get_state() == ACTIVE_);
         }
 
 
         // Buffer the flit
-        m_vcs[vc]->insertFlit(t_flit);
+        virtualChannels[vc].insertFlit(t_flit);
 
         int vnet = vc/m_vc_per_vnet;
         // number of writes same as reads
@@ -142,7 +130,7 @@ void
 InputUnit::increment_credit(int in_vc, bool free_signal, Cycles curTime)
 {
     Credit *t_credit = new Credit(in_vc, free_signal, curTime);
-    creditQueue->insert(t_credit);
+    creditQueue.insert(t_credit);
     m_credit_link->scheduleEventAbsolute(m_router->clockEdge(Cycles(1)));
 }
 
@@ -151,8 +139,8 @@ uint32_t
 InputUnit::functionalWrite(Packet *pkt)
 {
     uint32_t num_functional_writes = 0;
-    for (int i=0; i < m_num_vcs; i++) {
-        num_functional_writes += m_vcs[i]->functionalWrite(pkt);
+    for (auto& virtual_channel : virtualChannels) {
+        num_functional_writes += virtual_channel.functionalWrite(pkt);
     }
 
     return num_functional_writes;

diff --git a/src/mem/ruby/network/garnet2.0/InputUnit.hh b/src/mem/ruby/network/garnet2.0/InputUnit.hh
index 9e53a779e0f823a26c73d23faed27aeafb011049..d0e2ef66b85c9ecdad48708a9c30212df063e589 100644 (file)
--- a/src/mem/ruby/network/garnet2.0/InputUnit.hh
+++ b/src/mem/ruby/network/garnet2.0/InputUnit.hh
@@ -1,6 +1,7 @@
 /*
- * Copyright (c) 2008 Princeton University
+ * Copyright (c) 2020 Inria
  * Copyright (c) 2016 Georgia Institute of Technology
+ * Copyright (c) 2008 Princeton University
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -46,7 +47,7 @@ class InputUnit : public Consumer
 {
   public:
     InputUnit(int id, PortDirection direction, Router *router);
-    ~InputUnit();
+    ~InputUnit() = default;
 
     void wakeup();
     void print(std::ostream& out) const {};
@@ -56,43 +57,43 @@ class InputUnit : public Consumer
     inline void
     set_vc_idle(int vc, Cycles curTime)
     {
-        m_vcs[vc]->set_idle(curTime);
+        virtualChannels[vc].set_idle(curTime);
     }
 
     inline void
     set_vc_active(int vc, Cycles curTime)
     {
-        m_vcs[vc]->set_active(curTime);
+        virtualChannels[vc].set_active(curTime);
     }
 
     inline void
     grant_outport(int vc, int outport)
     {
-        m_vcs[vc]->set_outport(outport);
+        virtualChannels[vc].set_outport(outport);
     }
 
     inline void
     grant_outvc(int vc, int outvc)
     {
-        m_vcs[vc]->set_outvc(outvc);
+        virtualChannels[vc].set_outvc(outvc);
     }
 
     inline int
     get_outport(int invc)
     {
-        return m_vcs[invc]->get_outport();
+        return virtualChannels[invc].get_outport();
     }
 
     inline int
     get_outvc(int invc)
     {
-        return m_vcs[invc]->get_outvc();
+        return virtualChannels[invc].get_outvc();
     }
 
     inline Cycles
     get_enqueue_time(int invc)
     {
-        return m_vcs[invc]->get_enqueue_time();
+        return virtualChannels[invc].get_enqueue_time();
     }
 
     void increment_credit(int in_vc, bool free_signal, Cycles curTime);
@@ -100,28 +101,28 @@ class InputUnit : public Consumer
     inline flit*
     peekTopFlit(int vc)
     {
-        return m_vcs[vc]->peekTopFlit();
+        return virtualChannels[vc].peekTopFlit();
     }
 
     inline flit*
     getTopFlit(int vc)
     {
-        return m_vcs[vc]->getTopFlit();
+        return virtualChannels[vc].getTopFlit();
     }
 
     inline bool
     need_stage(int vc, flit_stage stage, Cycles time)
     {
-        return m_vcs[vc]->need_stage(stage, time);
+        return virtualChannels[vc].need_stage(stage, time);
     }
 
     inline bool
     isReady(int invc, Cycles curTime)
     {
-        return m_vcs[invc]->isReady(curTime);
+        return virtualChannels[invc].isReady(curTime);
     }
 
-    flitBuffer* getCreditQueue() { return creditQueue; }
+    flitBuffer* getCreditQueue() { return &creditQueue; }
 
     inline void
     set_in_link(NetworkLink *link)
@@ -146,18 +147,16 @@ class InputUnit : public Consumer
     void resetStats();
 
   private:
+    Router *m_router;
     int m_id;
     PortDirection m_direction;
-    int m_num_vcs;
     int m_vc_per_vnet;
-
-    Router *m_router;
     NetworkLink *m_in_link;
     CreditLink *m_credit_link;
-    flitBuffer *creditQueue;
+    flitBuffer creditQueue;
 
     // Input Virtual channels
-    std::vector<VirtualChannel *> m_vcs;
+    std::vector<VirtualChannel> virtualChannels;
 
     // Statistical variables
     std::vector<double> m_num_buffer_writes;