+2014-01-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/59880
+ * config/i386/i386.c (ix86_avoid_lea_for_addr): Return false
+ if operands[1] is a REG or ZERO_EXTEND of a REG.
+
2014-01-19 Jan Hubicka <jh@suse.cz>
* varasm.c (compute_reloc_for_constant): Use targetm.binds_local_p.
if (!TARGET_AVOID_LEA_FOR_ADDR || optimize_function_for_size_p (cfun))
return false;
+ /* The "at least two components" test below might not catch simple
+ *mov[sd]i_internal or *zero_extendsidi2 insns if parts.base is
+ non-NULL and parts.disp is const0_rtx as the only components in
+ the address, e.g. if the register is %rbp or %r13. As this
+ test is much cheaper and moves or zero extensions are the common
+ case, do this check first. */
+ if (REG_P (operands[1])
+ || (GET_CODE (operands[1]) == ZERO_EXTEND
+ && REG_P (XEXP (operands[1], 0))))
+ return false;
+
/* Check it is correct to split here. */
- if (!ix86_ok_to_clobber_flags(insn))
+ if (!ix86_ok_to_clobber_flags (insn))
return false;
ok = ix86_decompose_address (operands[1], &parts);
+2014-01-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/59880
+ * gcc.target/i386/pr59880.c: New test.
+
2014-01-20 Renlin Li <renlin.li@arm.com>
* gcc.dg/pr44194-1.c: Tweak regexp.
2014-01-17 Jakub Jelinek <jakub@redhat.com>
PR testsuite/58776
- * gcc.dg/tree-ssa-gen-vect-32.c: Add -fno-vect-cost-model to
+ * gcc.dg/tree-ssa/gen-vect-32.c: Add -fno-vect-cost-model to
dg-options, use dg-additional-options for i?86/x86_64 to avoid
option duplication.
--- /dev/null
+/* PR target/59880 */
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -mtune=silvermont" } */
+
+register unsigned int r13 __asm ("r13");
+unsigned long long
+foo (void)
+{
+ return r13;
+}
+
+/* Ensure we don't emit a useless zero-extension after another
+ zero-extension. */
+/* { dg-final { scan-assembler-not "%eax, %eax" } } */