re PR target/59880 (ix86_avoid_lea_for_addr is buggy)

	PR target/59880
	* config/i386/i386.c (ix86_avoid_lea_for_addr): Return false
	if operands[1] is a REG or ZERO_EXTEND of a REG.

	* gcc.target/i386/pr59880.c: New test.

From-SVN: r206792

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5f89ce166117e2af2eb3bbcccf56122720e7b3ff..ef099b1a5c21689102cb46d6df1f08a0ad4de19c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2014-01-20  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/59880
+       * config/i386/i386.c (ix86_avoid_lea_for_addr): Return false
+       if operands[1] is a REG or ZERO_EXTEND of a REG.
+
 2014-01-19  Jan Hubicka  <jh@suse.cz>
 
        * varasm.c (compute_reloc_for_constant): Use targetm.binds_local_p.

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index ff210c8009d8f403057c933bc0790adb130a7a26..9991c30b11c9e0d4f519db8ba0fa7eb6b9862313 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -18159,8 +18159,19 @@ ix86_avoid_lea_for_addr (rtx insn, rtx operands[])
   if (!TARGET_AVOID_LEA_FOR_ADDR || optimize_function_for_size_p (cfun))
     return false;
 
+  /* The "at least two components" test below might not catch simple
+     *mov[sd]i_internal or *zero_extendsidi2 insns if parts.base is
+     non-NULL and parts.disp is const0_rtx as the only components in
+     the address, e.g. if the register is %rbp or %r13.  As this
+     test is much cheaper and moves or zero extensions are the common
+     case, do this check first.  */
+  if (REG_P (operands[1])
+      || (GET_CODE (operands[1]) == ZERO_EXTEND
+         && REG_P (XEXP (operands[1], 0))))
+    return false;
+
   /* Check it is correct to split here.  */
-  if (!ix86_ok_to_clobber_flags(insn))
+  if (!ix86_ok_to_clobber_flags (insn))
     return false;
 
   ok = ix86_decompose_address (operands[1], &parts);

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index e8ba908ae89b7b50faa613f85a79c90bcc3c3736..e9f59abf675ebf206a23cf67d3b3e186f03a16c0 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2014-01-20  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/59880
+       * gcc.target/i386/pr59880.c: New test.
+
 2014-01-20  Renlin Li  <renlin.li@arm.com>
 
        * gcc.dg/pr44194-1.c: Tweak regexp.
@@ -72,7 +77,7 @@
 2014-01-17  Jakub Jelinek  <jakub@redhat.com>
 
        PR testsuite/58776
-       * gcc.dg/tree-ssa-gen-vect-32.c: Add -fno-vect-cost-model to
+       * gcc.dg/tree-ssa/gen-vect-32.c: Add -fno-vect-cost-model to
        dg-options, use dg-additional-options for i?86/x86_64 to avoid
        option duplication.
 

diff --git a/gcc/testsuite/gcc.target/i386/pr59880.c b/gcc/testsuite/gcc.target/i386/pr59880.c
new file mode 100644 (file)
index 0000000..5a11692
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59880.c
@@ -0,0 +1,14 @@
+/* PR target/59880 */
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -mtune=silvermont" } */
+
+register unsigned int r13 __asm ("r13");
+unsigned long long
+foo (void)
+{
+  return r13;
+}
+
+/* Ensure we don't emit a useless zero-extension after another
+   zero-extension.  */
+/* { dg-final { scan-assembler-not "%eax, %eax" } } */