Fix R/R conflicts
authorKamil Rakoczy <krakoczy@antmicro.com>
Fri, 10 Jul 2020 08:14:31 +0000 (10:14 +0200)
committerKamil Rakoczy <krakoczy@antmicro.com>
Fri, 10 Jul 2020 13:03:01 +0000 (15:03 +0200)
This commit fixes R/R conflicts introduced by commit 7e83a51.
Parameter logic is already defined as part of `param_range_type` rule.

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
frontends/verilog/verilog_parser.y

index dfdb11cf0e6fe7a5086c6f47cc0b2683894c2850..1c86c7895716545a595fdf0e96c52fe6398fc882 100644 (file)
@@ -1348,13 +1348,6 @@ param_real:
                astbuf1->children.push_back(new AstNode(AST_REALVALUE));
        }
 
-param_logic:
-       TOK_LOGIC {
-               // SV LRM 6.11, Table 6-8: logic -- 4-state, user-defined vector size, unsigned
-               astbuf1->is_signed = false;
-               astbuf1->is_logic = true;
-       }
-
 param_range:
        range {
                if ($1 != NULL) {
@@ -1366,10 +1359,8 @@ param_integer_type: param_integer param_signed
 param_range_type: type_vec param_signed param_range
 param_implicit_type: param_signed param_range
 
-param_integer_vector_type: param_logic param_signed param_range
-
 param_type:
-       param_integer_type | param_integer_vector_type | param_real | param_range_type | param_implicit_type |
+       param_integer_type | param_real | param_range_type | param_implicit_type |
        hierarchical_type_id {
                astbuf1->is_custom_type = true;
                astbuf1->children.push_back(new AstNode(AST_WIRETYPE));