re PR target/81800 (On aarch64 ilp32 lrint should not be inlined as two instructions)

2017-10-26  Tamar Christina  <tamar.christina@arm.com>

	PR target/81800
	* config/aarch64/aarch64.md (lrint<GPF:mode><GPI:mode>2): Add flag_trapping_math
	and flag_fp_int_builtin_inexact.

gcc/testsuite/
2017-10-26  Tamar Christina  <tamar.christina@arm.com>

	* gcc.target/aarch64/inline-lrint_2.c (dg-options): Add -fno-trapping-math.

From-SVN: r254098

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5e297fb8b0fdf396a6b5f69b91ea828bff5bc26d..ad54a57e1c04416fbc119c6d08b92a01f0f8e7c0 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2017-10-26  Tamar Christina  <tamar.christina@arm.com>
+
+       PR target/81800
+       * config/aarch64/aarch64.md (lrint<GPF:mode><GPI:mode>2): Add flag_trapping_math
+       and flag_fp_int_builtin_inexact.
+
 2017-10-25  Palmer Dabbelt  <palmer@dabbelt.com>
 
        * config/riscv/riscv.md (ZERO_EXTEND_LOAD): Define.

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 389f2f9d31aadce4b3f758508279bdf2ffaf52e3..eee836be0555ef79d82a5545801b9910b5797fd7 100644 (file)
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -5155,7 +5155,9 @@
 (define_expand "lrint<GPF:mode><GPI:mode>2"
   [(match_operand:GPI 0 "register_operand")
    (match_operand:GPF 1 "register_operand")]
-  "TARGET_FLOAT"
+  "TARGET_FLOAT
+   && ((GET_MODE_SIZE (<GPF:MODE>mode) <= GET_MODE_SIZE (<GPI:MODE>mode))
+   || !flag_trapping_math || flag_fp_int_builtin_inexact)"
 {
   rtx cvt = gen_reg_rtx (<GPF:MODE>mode);
   emit_insn (gen_rint<GPF:mode>2 (cvt, operands[1]));

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index cf7095ea308e0ab998a3e1fd812aff76efcb7080..8dcf46104d6b58e52e20c3e0370a4e967e480c11 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2017-10-26  Tamar Christina  <tamar.christina@arm.com>
+
+       * gcc.target/aarch64/inline-lrint_2.c (dg-options): Add -fno-trapping-math.
+
 2017-10-26  Tamar Christina  <tamar.christina@arm.com>
 
        * gcc.target/aarch64/advsimd-intrinsics/vect-dot-qi.h: New.

diff --git a/gcc/testsuite/gcc.target/aarch64/inline-lrint_2.c b/gcc/testsuite/gcc.target/aarch64/inline-lrint_2.c
index 6080e186d8f0c6f5ede81c6438e059e8b976378f..bd0c73c8d34a2cb52d0a453a175bedd59bba5457 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/inline-lrint_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/inline-lrint_2.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 /* { dg-require-effective-target ilp32 } */
-/* { dg-options "-O3 -fno-math-errno" } */
+/* { dg-options "-O3 -fno-math-errno -fno-trapping-math" } */
 
 #include "lrint-matherr.h"