+2015-12-18 Dominik Vogt <vogt@linux.vnet.ibm.com>
+
+ * config/s390/s390.c (s390_init_frame_layout): Try r4 to r2 for the
+ literal pool pointer.
+
2015-12-18 Yuri Rumyantsev <ysrumyan@gmail.com>
PR tree-optimization/68906
as base register to avoid save/restore overhead. */
if (!base_used)
cfun->machine->base_reg = NULL_RTX;
- else if (crtl->is_leaf && !df_regs_ever_live_p (5))
- cfun->machine->base_reg = gen_rtx_REG (Pmode, 5);
else
- cfun->machine->base_reg = gen_rtx_REG (Pmode, BASE_REGNUM);
+ {
+ int br = 0;
+
+ if (crtl->is_leaf)
+ /* Prefer r5 (most likely to be free). */
+ for (br = 5; br >= 2 && df_regs_ever_live_p (br); br--)
+ ;
+ cfun->machine->base_reg =
+ gen_rtx_REG (Pmode, (br > 0) ? br : BASE_REGNUM);
+ }
s390_register_info ();
s390_frame_info ();
+2015-12-18 Dominik Vogt <vogt@linux.vnet.ibm.com>
+
+ * gcc.target/s390/litpool-r3-1.c: New test.
+
2015-12-18 Yuri Rumyantsev <ysrumyan@gmail.com>
PR tree-optimization/68906
--- /dev/null
+/* Validate that r3 may be used as the literal pool pointer. Test that only on
+ 64-bit for z900 to simplify the test. It's not really different on 31-bit
+ or other cpus. */
+
+/* { dg-do compile { target { lp64 } } } */
+/* { dg-options "-march=z900 -O2" } */
+
+__int128 gi;
+const int c = 0x12345678u;
+int foo(void)
+{
+ gi += c;
+ return c;
+}
+
+/* { dg-final { scan-assembler-times "\tlarl\t%r3,.L3" 1 } } */