Use disassemble_info.private_data in place of insn_sets

No cgen target uses private_data.  This patch removes a
disassemble_info field that is only used by cgen, and instead uses
private_data.  It also removes a macro that is no longer used.

include/
	* dis-asm.h (struct disassemble_info): Delete insn_sets.
	(INIT_DISASSEMBLE_INFO_NO_ARCH): Don't define.
opcodes/
	* cgen-dis.in (print_insn_@arch@): Replace insn_sets with private_data.
	* disassemble.c (disassemble_init_for_target): Likewise.
	* bpf-dis.c: Regenerate.
	* epiphany-dis.c: Regenerate.
	* fr30-dis.c: Regenerate.
	* frv-dis.c: Regenerate.
	* ip2k-dis.c: Regenerate.
	* iq2000-dis.c: Regenerate.
	* lm32-dis.c: Regenerate.
	* m32c-dis.c: Regenerate.
	* m32r-dis.c: Regenerate.
	* mep-dis.c: Regenerate.
	* mt-dis.c: Regenerate.
	* or1k-dis.c: Regenerate.
	* xc16x-dis.c: Regenerate.
	* xstormy16-dis.c: Regenerate.

diff --git a/include/ChangeLog b/include/ChangeLog
index 42aa17d1dba58b188b8508eb4e33e545e884f205..7c4fcb82e2d54edc944bf86045ed4d5c317b1aac 100644 (file)
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,8 @@
+2019-12-10  Alan Modra  <amodra@gmail.com>
+
+       * dis-asm.h (struct disassemble_info): Delete insn_sets.
+       (INIT_DISASSEMBLE_INFO_NO_ARCH): Don't define.
+
 2019-12-05  Jan Beulich  <jbeulich@suse.com>
 
        * opcode/aarch64.h (AARCH64_FEATURE_CRYPTO): Expand to the

diff --git a/include/dis-asm.h b/include/dis-asm.h
index b4d5025811f6e2daf39d3da5d9e63056fee6ef75..c1746502ca2de39e6936cf117d26f2f7f4aba827 100644 (file)
--- a/include/dis-asm.h
+++ b/include/dis-asm.h
@@ -78,11 +78,6 @@ typedef struct disassemble_info
   enum bfd_endian endian;
   /* Endianness of code, for mixed-endian situations such as ARM BE8.  */
   enum bfd_endian endian_code;
-  /* An arch/mach-specific bitmask of selected instruction subsets, mainly
-     for processors with run-time-switchable instruction sets.  The default,
-     zero, means that there is no constraint.  CGEN-based opcodes ports
-     may use ISA_foo masks.  */
-  void *insn_sets;
 
   /* Some targets need information about the current section to accurately
      display insns.  If this is NULL, the target disassembler function
@@ -394,9 +389,6 @@ extern void init_disassemble_info (struct disassemble_info *dinfo, void *stream,
 /* For compatibility with existing code.  */
 #define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \
   init_disassemble_info (&(INFO), (STREAM), (fprintf_ftype) (FPRINTF_FUNC))
-#define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
-  init_disassemble_info (&(INFO), (STREAM), (fprintf_ftype) (FPRINTF_FUNC))
-
 
 #ifdef __cplusplus
 }

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 4d8dfe1bf5da7bdd40e720a355fb72e2c06a0c5e..579bad868b5866ac419ed061da29f26989ab4611 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,22 @@
+2019-12-10  Alan Modra  <amodra@gmail.com>
+
+       * cgen-dis.in (print_insn_@arch@): Replace insn_sets with private_data.
+       * disassemble.c (disassemble_init_for_target): Likewise.
+       * bpf-dis.c: Regenerate.
+       * epiphany-dis.c: Regenerate.
+       * fr30-dis.c: Regenerate.
+       * frv-dis.c: Regenerate.
+       * ip2k-dis.c: Regenerate.
+       * iq2000-dis.c: Regenerate.
+       * lm32-dis.c: Regenerate.
+       * m32c-dis.c: Regenerate.
+       * m32r-dis.c: Regenerate.
+       * mep-dis.c: Regenerate.
+       * mt-dis.c: Regenerate.
+       * or1k-dis.c: Regenerate.
+       * xc16x-dis.c: Regenerate.
+       * xstormy16-dis.c: Regenerate.
+
 2019-12-10  Alan Modra  <amodra@gmail.com>
 
        * ppc-dis.c (private): Delete variable.

diff --git a/opcodes/bpf-dis.c b/opcodes/bpf-dis.c
index c48bce85e6434a2e0e8aff7f11a955a820e5e8b2..99a292a3727ad7d657ab4cc636aa39d1ad6b6ed8 100644 (file)
--- a/opcodes/bpf-dis.c
+++ b/opcodes/bpf-dis.c
@@ -553,7 +553,7 @@ print_insn_bpf (bfd_vma pc, disassemble_info *info)
     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
   }
 #else
-  isa = info->insn_sets;
+  isa = info->private_data;
 #endif
 
   /* If we've switched cpu's, try to find a handle we've used before */

diff --git a/opcodes/cgen-dis.in b/opcodes/cgen-dis.in
index d1e06bf7b86f61adbb437af1b755d28583ec20d0..cf3e872de84e45815af6e43356ed60ade8c4092d 100644 (file)
--- a/opcodes/cgen-dis.in
+++ b/opcodes/cgen-dis.in
@@ -388,7 +388,7 @@ print_insn_@arch@ (bfd_vma pc, disassemble_info *info)
     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
   }
 #else
-  isa = info->insn_sets;
+  isa = info->private_data;
 #endif
 
   /* If we've switched cpu's, try to find a handle we've used before */

diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index aef2fd8644b34afe737ec0670c307dd85f291fd2..f131ee8520940d38949febae163b94716922796f 100644 (file)
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -654,26 +654,26 @@ disassemble_init_for_target (struct disassemble_info * info)
       /* This processor in fact is little endian.  The value set here
         reflects the way opcodes are written in the cgen description.  */
       info->endian = BFD_ENDIAN_BIG;
-      if (! info->insn_sets)
+      if (!info->private_data)
        {
-         info->insn_sets = cgen_bitset_create (ISA_MAX);
+         info->private_data = cgen_bitset_create (ISA_MAX);
          if (info->mach == bfd_mach_m16c)
-           cgen_bitset_set (info->insn_sets, ISA_M16C);
+           cgen_bitset_set (info->private_data, ISA_M16C);
          else
-           cgen_bitset_set (info->insn_sets, ISA_M32C);
+           cgen_bitset_set (info->private_data, ISA_M32C);
        }
       break;
 #endif
 #ifdef ARCH_bpf
     case bfd_arch_bpf:
-      if (!info->insn_sets)
-        {
-          info->insn_sets = cgen_bitset_create (ISA_EBPFMAX);
-          if (info->endian == BFD_ENDIAN_BIG)
-            cgen_bitset_set (info->insn_sets, ISA_EBPFBE);
-          else
-            cgen_bitset_set (info->insn_sets, ISA_EBPFLE);
-        }
+      if (!info->private_data)
+       {
+         info->private_data = cgen_bitset_create (ISA_EBPFMAX);
+         if (info->endian == BFD_ENDIAN_BIG)
+           cgen_bitset_set (info->private_data, ISA_EBPFBE);
+         else
+           cgen_bitset_set (info->private_data, ISA_EBPFLE);
+       }
       break;
 #endif
 #ifdef ARCH_pru

diff --git a/opcodes/epiphany-dis.c b/opcodes/epiphany-dis.c
index 376d678afcc5b1ae3b799e60535d2d49d92144b9..3c79031c999ae16eb97f64a7936870be5526d35b 100644 (file)
--- a/opcodes/epiphany-dis.c
+++ b/opcodes/epiphany-dis.c
@@ -629,7 +629,7 @@ print_insn_epiphany (bfd_vma pc, disassemble_info *info)
     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
   }
 #else
-  isa = info->insn_sets;
+  isa = info->private_data;
 #endif
 
   /* If we've switched cpu's, try to find a handle we've used before */

diff --git a/opcodes/fr30-dis.c b/opcodes/fr30-dis.c
index b83051b1fb78acef3eaef913fe7dc59bcf79ee69..2d1de96fa00e4f9a786264e6d1b010fdba8490a1 100644 (file)
--- a/opcodes/fr30-dis.c
+++ b/opcodes/fr30-dis.c
@@ -650,7 +650,7 @@ print_insn_fr30 (bfd_vma pc, disassemble_info *info)
     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
   }
 #else
-  isa = info->insn_sets;
+  isa = info->private_data;
 #endif
 
   /* If we've switched cpu's, try to find a handle we've used before */

diff --git a/opcodes/frv-dis.c b/opcodes/frv-dis.c
index 9df0dd59c004f77f9af84ae8851e3832fbdfdc04..bf9d4f789f100fa92860f12500a8a115433b6e62 100644 (file)
--- a/opcodes/frv-dis.c
+++ b/opcodes/frv-dis.c
@@ -747,7 +747,7 @@ print_insn_frv (bfd_vma pc, disassemble_info *info)
     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
   }
 #else
-  isa = info->insn_sets;
+  isa = info->private_data;
 #endif
 
   /* If we've switched cpu's, try to find a handle we've used before */

diff --git a/opcodes/ip2k-dis.c b/opcodes/ip2k-dis.c
index 3d3e8be412f533d610d22f83d0afc79cf7c98366..bc758a6618d51d9f9d39fc7f1d3d78cbb0ceb98d 100644 (file)
--- a/opcodes/ip2k-dis.c
+++ b/opcodes/ip2k-dis.c
@@ -639,7 +639,7 @@ print_insn_ip2k (bfd_vma pc, disassemble_info *info)
     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
   }
 #else
-  isa = info->insn_sets;
+  isa = info->private_data;
 #endif
 
   /* If we've switched cpu's, try to find a handle we've used before */

diff --git a/opcodes/iq2000-dis.c b/opcodes/iq2000-dis.c
index 422665e869cc96089e065fe59cbd6319623afa26..2762b642688c2258aa9eb431691d5a9ddccd2f5f 100644 (file)
--- a/opcodes/iq2000-dis.c
+++ b/opcodes/iq2000-dis.c
@@ -540,7 +540,7 @@ print_insn_iq2000 (bfd_vma pc, disassemble_info *info)
     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
   }
 #else
-  isa = info->insn_sets;
+  isa = info->private_data;
 #endif
 
   /* If we've switched cpu's, try to find a handle we've used before */

diff --git a/opcodes/lm32-dis.c b/opcodes/lm32-dis.c
index b18fb3dbfd425af113c0f40a8d33b5be979ca912..274b63f58eb79634601a6f55dc0cb74bb8e773df 100644 (file)
--- a/opcodes/lm32-dis.c
+++ b/opcodes/lm32-dis.c
@@ -498,7 +498,7 @@ print_insn_lm32 (bfd_vma pc, disassemble_info *info)
     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
   }
 #else
-  isa = info->insn_sets;
+  isa = info->private_data;
 #endif
 
   /* If we've switched cpu's, try to find a handle we've used before */

diff --git a/opcodes/m32c-dis.c b/opcodes/m32c-dis.c
index 92b87f283bf50b90f3e08a5f2ea671fdb6ae0201..b36868524c1835779b5b8a8fe03e5802f81543c6 100644 (file)
--- a/opcodes/m32c-dis.c
+++ b/opcodes/m32c-dis.c
@@ -1242,7 +1242,7 @@ print_insn_m32c (bfd_vma pc, disassemble_info *info)
     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
   }
 #else
-  isa = info->insn_sets;
+  isa = info->private_data;
 #endif
 
   /* If we've switched cpu's, try to find a handle we've used before */

diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c
index 8722d6b5b0f6e4e7f32cf3e01bf50c652fbff244..c778b88326e3834b618b846b73b4eea83af9f459 100644 (file)
--- a/opcodes/m32r-dis.c
+++ b/opcodes/m32r-dis.c
@@ -630,7 +630,7 @@ print_insn_m32r (bfd_vma pc, disassemble_info *info)
     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
   }
 #else
-  isa = info->insn_sets;
+  isa = info->private_data;
 #endif
 
   /* If we've switched cpu's, try to find a handle we've used before */

diff --git a/opcodes/mep-dis.c b/opcodes/mep-dis.c
index 13bcb472763dcab5a46a27add3a2126ac8ce92fb..79bd7761c5bc9a64cfb29f807af78dcbc0f9b679 100644 (file)
--- a/opcodes/mep-dis.c
+++ b/opcodes/mep-dis.c
@@ -1538,7 +1538,7 @@ print_insn_mep (bfd_vma pc, disassemble_info *info)
     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
   }
 #else
-  isa = info->insn_sets;
+  isa = info->private_data;
 #endif
 
   /* If we've switched cpu's, try to find a handle we've used before */

diff --git a/opcodes/mt-dis.c b/opcodes/mt-dis.c
index 44e6720fc1694228ae66e535bb04fb48f11a6eaf..00b3d06ed3976144770702038323a7b69c691894 100644 (file)
--- a/opcodes/mt-dis.c
+++ b/opcodes/mt-dis.c
@@ -641,7 +641,7 @@ print_insn_mt (bfd_vma pc, disassemble_info *info)
     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
   }
 #else
-  isa = info->insn_sets;
+  isa = info->private_data;
 #endif
 
   /* If we've switched cpu's, try to find a handle we've used before */

diff --git a/opcodes/or1k-dis.c b/opcodes/or1k-dis.c
index 74bf38f26b70b9237bc28d82760486975ba7236d..dce00b3f2815554cae2dcb01546f98a3a5bcb4d6 100644 (file)
--- a/opcodes/or1k-dis.c
+++ b/opcodes/or1k-dis.c
@@ -534,7 +534,7 @@ print_insn_or1k (bfd_vma pc, disassemble_info *info)
     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
   }
 #else
-  isa = info->insn_sets;
+  isa = info->private_data;
 #endif
 
   /* If we've switched cpu's, try to find a handle we've used before */

diff --git a/opcodes/xc16x-dis.c b/opcodes/xc16x-dis.c
index 2c61e81287c5249c00f025f974a477545dbc057b..3081083821d8cf1af0aad94f338f749aa0b602d2 100644 (file)
--- a/opcodes/xc16x-dis.c
+++ b/opcodes/xc16x-dis.c
@@ -771,7 +771,7 @@ print_insn_xc16x (bfd_vma pc, disassemble_info *info)
     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
   }
 #else
-  isa = info->insn_sets;
+  isa = info->private_data;
 #endif
 
   /* If we've switched cpu's, try to find a handle we've used before */

diff --git a/opcodes/xstormy16-dis.c b/opcodes/xstormy16-dis.c
index 2382d08297ab28f3477b579a5f500e82707f2ba5..7da09f373e0b25eb14367b43b616cd4793528037 100644 (file)
--- a/opcodes/xstormy16-dis.c
+++ b/opcodes/xstormy16-dis.c
@@ -519,7 +519,7 @@ print_insn_xstormy16 (bfd_vma pc, disassemble_info *info)
     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
   }
 #else
-  isa = info->insn_sets;
+  isa = info->private_data;
 #endif
 
   /* If we've switched cpu's, try to find a handle we've used before */