(no commit message)

diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn
index a2b58daa6fdd0d3127ce3bdff2f927dd6a314962..2a9efc724b0d2a7f2271891c73da6d85bb53b49a 100644 (file)
--- a/openpower/sv/bitmanip.mdwn
+++ b/openpower/sv/bitmanip.mdwn
@@ -54,7 +54,7 @@ ternlog has its own major opcode
 |  010   |Rc| bitmask   |
 |  011   |  | gf/cl madd*  |
 |  110   |Rc| 1/2-op    |
-|  111   |  |           |
+|  111   |  | bmrevi   |
 
 
 1-op and variants
@@ -93,7 +93,7 @@ TODO: convert all instructions to use RT and not RS
 | NN | RT | RA  | RB   |         |        00 |0 | rsvd   |
 | NN | RT | RA  | RB   | im0-4   | im5-7  00 |1 | grevlog |
 | NN | RT | RA  | s0-4 | im0-4   | im5-7  01 |s5| grevlogi |
-| NN | RT | RA  | RB   | sh0-4   | sh5 1 010 |Rc| bmrevi |
+| NN | RT | RA  | RB   | sh0-4   | mode  010 |Rc| bitmask* |
 | NN | RS | RA  | RB   | RC      | 00    011 |0 | gfbmadd |
 | NN | RS | RA  | RB   | RC      | 00    011 |1 | gfbmaddsub |
 | NN | RS | RA  | RB   | RC      | 01    011 |0 | clmadd |
@@ -101,6 +101,7 @@ TODO: convert all instructions to use RT and not RS
 | NN | RS | RA  | RB   | RC      | 10    011 |0 | gfpmadd |
 | NN | RS | RA  | RB   | RC      | 10    011 |1 | gfpmaddsub |
 | NN | RS | RA  | RB   | RC      | 11    011 |  | rsvd |
+| NN | RT | RA  | RB   | sh0-4   | sh5 1 111 |Rc| bmrevi |
 
 ops (note that av avg and abs as well as vec scalar mask
 are included here)