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Added english language description, spaces and brackets for lwzx instruction
author
Shriya Sharma
<shriya@redsemiconductor.com>
Tue, 26 Sep 2023 10:31:02 +0000
(11:31 +0100)
committer
Shriya Sharma
<shriya@redsemiconductor.com>
Tue, 26 Sep 2023 10:31:02 +0000
(11:31 +0100)
openpower/isa/fixedload.mdwn
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diff --git
a/openpower/isa/fixedload.mdwn
b/openpower/isa/fixedload.mdwn
index 1199024d3ed3019e5b04be53474f86781fc6462d..f2339b89d66dbb917b4a45384d10e2ef4ba0352b 100644
(file)
--- a/
openpower/isa/fixedload.mdwn
+++ b/
openpower/isa/fixedload.mdwn
@@
-351,6
+351,12
@@
Pseudo-code:
EA <- b + (RB)
RT <- [0] * 32 || MEM(EA, 4)
+Description:
+
+ Let the effective address (EA) be the sum
+ (RA|0)+ (RB). The word in storage addressed by EA is
+ loaded into RT[32:63] . RT[0:31] are set to 0.
+
Special Registers Altered:
None