The only major caveat is that the registers to be used as
Indices must not be modified by any instruction after Indexed Mode
-is established, and neither must MAXVL be altered. Failure to observe
+is established, and neither must MAXVL be altered. Additionally,
+no register used as an Index may exceed MAXVL.
+
+Failure to observe
these conditions results in `UNDEFINED` behaviour.
These conditions allow a Read-After-Write (RAW) Hazard to be created on
the entire range of Indices to be subsequently used, but a corresponding
Beyond these mappings it becomes necessary to write directly to
the SVSTATE SPRs manually.
+
# TODO
* investigate https://www.ncbi.nlm.nih.gov/pmc/articles/PMC6879380/#!po=19.6429