radv: fix shared memory load/stores.
authorDave Airlie <airlied@redhat.com>
Fri, 3 Feb 2017 03:26:13 +0000 (03:26 +0000)
committerDave Airlie <airlied@redhat.com>
Fri, 3 Feb 2017 19:53:03 +0000 (19:53 +0000)
If we have an indirect index here we need to scale it by attribute slots
e.g. is this is vec2[256] then we get an indir_index in the 0.255 range
but the vec2 are aligned inside vec4 slots. So scale the indir index,
then extract the channels.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
src/amd/common/ac_nir_to_llvm.c

index 9be6e77f86b94ed338d488f37dee3547d3eb2a3c..566516fd8a35b5781f73a115a805b81693c21534 100644 (file)
@@ -2237,6 +2237,9 @@ static LLVMValueRef visit_load_var(struct nir_to_llvm_context *ctx,
                LLVMValueRef ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
                LLVMValueRef derived_ptr;
 
+               if (indir_index)
+                       indir_index = LLVMBuildMul(ctx->builder, indir_index, LLVMConstInt(ctx->i32, 4, false), "");
+
                for (unsigned chan = 0; chan < ve; chan++) {
                        LLVMValueRef index = LLVMConstInt(ctx->i32, chan, false);
                        if (indir_index)
@@ -2343,6 +2346,10 @@ visit_store_var(struct nir_to_llvm_context *ctx,
                break;
        case nir_var_shared: {
                LLVMValueRef ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
+
+               if (indir_index)
+                       indir_index = LLVMBuildMul(ctx->builder, indir_index, LLVMConstInt(ctx->i32, 4, false), "");
+
                for (unsigned chan = 0; chan < 8; chan++) {
                        if (!(writemask & (1 << chan)))
                                continue;