re PR target/47754 ([missed optimization] AVX allows unaligned memory operands but...

	PR target/47754
	* config/i386/i386.c (ix86_avx256_split_vector_move_misalign): If
	op1 is misaligned_operand, just use *mov<mode>_internal insn
	rather than UNSPEC_LOADU load.
	(ix86_expand_vector_move_misalign): Likewise (for TARGET_AVX only).
	Avoid gen_lowpart on op0 if it isn't MEM.

	* gcc.target/i386/avx256-unaligned-load-1.c: Adjust scan-assembler
	and scan-assembler-not regexps.
	* gcc.target/i386/avx256-unaligned-load-2.c: Likewise.
	* gcc.target/i386/avx256-unaligned-load-3.c: Likewise.
	* gcc.target/i386/avx256-unaligned-load-4.c: Likewise.
	* gcc.target/i386/l_fma_float_1.c: Use pattern for
	scan-assembler-times instead of just one insn name.
	* gcc.target/i386/l_fma_float_2.c: Likewise.
	* gcc.target/i386/l_fma_float_3.c: Likewise.
	* gcc.target/i386/l_fma_float_4.c: Likewise.
	* gcc.target/i386/l_fma_float_5.c: Likewise.
	* gcc.target/i386/l_fma_float_6.c: Likewise.
	* gcc.target/i386/l_fma_double_1.c: Likewise.
	* gcc.target/i386/l_fma_double_2.c: Likewise.
	* gcc.target/i386/l_fma_double_3.c: Likewise.
	* gcc.target/i386/l_fma_double_4.c: Likewise.
	* gcc.target/i386/l_fma_double_5.c: Likewise.
	* gcc.target/i386/l_fma_double_6.c: Likewise.

From-SVN: r204219

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 2df39551a3856f17ffd931f1bc1dddc23b456cdc..93a8b288c05dfc0ba29b7744c69571f428dfd510 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -16560,6 +16560,12 @@ ix86_avx256_split_vector_move_misalign (rtx op0, rtx op1)
          r = gen_rtx_VEC_CONCAT (GET_MODE (op0), r, m);
          emit_move_insn (op0, r);
        }
+      /* Normal *mov<mode>_internal pattern will handle
+        unaligned loads just fine if misaligned_operand
+        is true, and without the UNSPEC it can be combined
+        with arithmetic instructions.  */
+      else if (misaligned_operand (op1, GET_MODE (op1)))
+       emit_insn (gen_rtx_SET (VOIDmode, op0, op1));
       else
        emit_insn (load_unaligned (op0, op1));
     }
@@ -16634,7 +16640,7 @@ ix86_avx256_split_vector_move_misalign (rtx op0, rtx op1)
 void
 ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
 {
-  rtx op0, op1, m;
+  rtx op0, op1, orig_op0 = NULL_RTX, m;
   rtx (*load_unaligned) (rtx, rtx);
   rtx (*store_unaligned) (rtx, rtx);
 
@@ -16647,7 +16653,16 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
        {
        case MODE_VECTOR_INT:
        case MODE_INT:
-         op0 = gen_lowpart (V16SImode, op0);
+         if (GET_MODE (op0) != V16SImode)
+           {
+             if (!MEM_P (op0))
+               {
+                 orig_op0 = op0;
+                 op0 = gen_reg_rtx (V16SImode);
+               }
+             else
+               op0 = gen_lowpart (V16SImode, op0);
+           }
          op1 = gen_lowpart (V16SImode, op1);
          /* FALLTHRU */
 
@@ -16676,6 +16691,8 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
            emit_insn (store_unaligned (op0, op1));
          else
            gcc_unreachable ();
+         if (orig_op0)
+           emit_move_insn (orig_op0, gen_lowpart (GET_MODE (orig_op0), op0));
          break;
 
        default:
@@ -16692,12 +16709,23 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
        {
        case MODE_VECTOR_INT:
        case MODE_INT:
-         op0 = gen_lowpart (V32QImode, op0);
+         if (GET_MODE (op0) != V32QImode)
+           {
+             if (!MEM_P (op0))
+               {
+                 orig_op0 = op0;
+                 op0 = gen_reg_rtx (V32QImode);
+               }
+             else
+               op0 = gen_lowpart (V32QImode, op0);
+           }
          op1 = gen_lowpart (V32QImode, op1);
          /* FALLTHRU */
 
        case MODE_VECTOR_FLOAT:
          ix86_avx256_split_vector_move_misalign (op0, op1);
+         if (orig_op0)
+           emit_move_insn (orig_op0, gen_lowpart (GET_MODE (orig_op0), op0));
          break;
 
        default:
@@ -16709,15 +16737,30 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
 
   if (MEM_P (op1))
     {
+      /* Normal *mov<mode>_internal pattern will handle
+        unaligned loads just fine if misaligned_operand
+        is true, and without the UNSPEC it can be combined
+        with arithmetic instructions.  */
+      if (TARGET_AVX
+         && (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
+             || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
+         && misaligned_operand (op1, GET_MODE (op1)))
+       emit_insn (gen_rtx_SET (VOIDmode, op0, op1));
       /* ??? If we have typed data, then it would appear that using
         movdqu is the only way to get unaligned data loaded with
         integer type.  */
-      if (TARGET_SSE2 && GET_MODE_CLASS (mode) == MODE_VECTOR_INT)
+      else if (TARGET_SSE2 && GET_MODE_CLASS (mode) == MODE_VECTOR_INT)
        {
-         op0 = gen_lowpart (V16QImode, op0);
+         if (GET_MODE (op0) != V16QImode)
+           {
+             orig_op0 = op0;
+             op0 = gen_reg_rtx (V16QImode);
+           }
          op1 = gen_lowpart (V16QImode, op1);
          /* We will eventually emit movups based on insn attributes.  */
          emit_insn (gen_sse2_loaddquv16qi (op0, op1));
+         if (orig_op0)
+           emit_move_insn (orig_op0, gen_lowpart (GET_MODE (orig_op0), op0));
        }
       else if (TARGET_SSE2 && mode == V2DFmode)
         {
@@ -16765,9 +16808,16 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
              || TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL
              || optimize_insn_for_size_p ())
            {
-             op0 = gen_lowpart (V4SFmode, op0);
+             if (GET_MODE (op0) != V4SFmode)
+               {
+                 orig_op0 = op0;
+                 op0 = gen_reg_rtx (V4SFmode);
+               }
              op1 = gen_lowpart (V4SFmode, op1);
              emit_insn (gen_sse_loadups (op0, op1));
+             if (orig_op0)
+               emit_move_insn (orig_op0,
+                               gen_lowpart (GET_MODE (orig_op0), op0));
              return;
             }
 

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
index e7eef6d7a90966e635c52e1dec147b38c6e58ead..1fe52bbb598e60835c562ea90491eb2d785f3338 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
@@ -14,6 +14,6 @@ avx_test (void)
     c[i] = a[i] * b[i+3];
 }
 
-/* { dg-final { scan-assembler-not "avx_loadups256" } } */
-/* { dg-final { scan-assembler "sse_loadups" } } */
+/* { dg-final { scan-assembler-not "(avx_loadups256|vmovups\[^\n\r]*movv8sf_internal)" } } */
+/* { dg-final { scan-assembler "(sse_loadups|movv4sf_internal)" } } */
 /* { dg-final { scan-assembler "vinsertf128" } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c
index e3ec8542e0111750a808467065b40b1e99e82e11..933f265eed53a1084656091f14e19e82439d9864 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c
@@ -10,6 +10,6 @@ avx_test (char **cp, char **ep)
     *ap++ = *cp++;
 }
 
-/* { dg-final { scan-assembler-not "avx_loaddqu256" } } */
-/* { dg-final { scan-assembler "sse2_loaddqu" } } */
+/* { dg-final { scan-assembler-not "(avx_loaddqu256|vmovdqu\[^\n\r]*movv32qi_internal)" } } */
+/* { dg-final { scan-assembler "(sse2_loaddqu|vmovdqu\[^\n\r]*movv16qi_internal)" } } */
 /* { dg-final { scan-assembler "vinsert.128" } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c
index b0e0e79bdd8486e49e98a8d92bbe1f6fa894beed..fe66e0b1713cb4c4656f983bdc6f909d032c427b 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c
@@ -14,6 +14,6 @@ avx_test (void)
     c[i] = a[i] * b[i+3];
 }
 
-/* { dg-final { scan-assembler-not "avx_loadupd256" } } */
-/* { dg-final { scan-assembler "sse2_loadupd" } } */
+/* { dg-final { scan-assembler-not "(avx_loadupd256|vmovupd\[^\n\r]*movv4df_internal)" } } */
+/* { dg-final { scan-assembler "(sse2_loadupd|vmovupd\[^\n\r]*movv2df_internal)" } } */
 /* { dg-final { scan-assembler "vinsertf128" } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c
index c5afa061963022434e456085f3b6b8fe1a269ba6..1d35ef57b48d3261f2b7f9fb7e437b50f0fe090e 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c
@@ -14,6 +14,6 @@ avx_test (void)
     b[i] = a[i+3] * 2;
 }
 
-/* { dg-final { scan-assembler "avx_loadups256" } } */
-/* { dg-final { scan-assembler-not "sse_loadups" } } */
+/* { dg-final { scan-assembler "(avx_loadups256|vmovups\[^\n\r]*movv8sf_internal)" } } */
+/* { dg-final { scan-assembler-not "(sse_loadups|vmovups\[^\n\r]*movv4sf_internal)" } } */
 /* { dg-final { scan-assembler-not "vinsertf128" } } */

diff --git a/gcc/testsuite/gcc.target/i386/l_fma_double_1.c b/gcc/testsuite/gcc.target/i386/l_fma_double_1.c
index 55042f055ce3864f25a042438328bc7eb3c7199a..1d99b4caa5b0981419d997cf3d3a4981393cdf04 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/l_fma_double_1.c
+++ b/gcc/testsuite/gcc.target/i386/l_fma_double_1.c
@@ -9,15 +9,11 @@ typedef double adouble __attribute__((aligned(sizeof (double))));
 
 #include "l_fma_1.h"
 
-/* { dg-final { scan-assembler-times "vfmadd132pd" 4  } } */
-/* { dg-final { scan-assembler-times "vfmadd231pd" 4  } } */
-/* { dg-final { scan-assembler-times "vfmsub132pd" 4  } } */
-/* { dg-final { scan-assembler-times "vfmsub231pd" 4  } } */
-/* { dg-final { scan-assembler-times "vfnmadd132pd" 4  } } */
-/* { dg-final { scan-assembler-times "vfnmadd231pd" 4  } } */
-/* { dg-final { scan-assembler-times "vfnmsub132pd" 4  } } */
-/* { dg-final { scan-assembler-times "vfnmsub231pd" 4  } } */
-/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56  } } */
+/* { dg-final { scan-assembler-times "vfmadd\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */
 /* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */
 /* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */
 /* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 56 } } */

diff --git a/gcc/testsuite/gcc.target/i386/l_fma_double_2.c b/gcc/testsuite/gcc.target/i386/l_fma_double_2.c
index c61c30114d6926660faf2ca9d307547f21235384..e10110006f3afc13c626efc6199e960e43f32714 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/l_fma_double_2.c
+++ b/gcc/testsuite/gcc.target/i386/l_fma_double_2.c
@@ -9,11 +9,11 @@ typedef double adouble __attribute__((aligned(sizeof (double))));
 
 #include "l_fma_2.h"
 
-/* { dg-final { scan-assembler-times "vfmadd132pd" 8  } } */
-/* { dg-final { scan-assembler-times "vfmsub132pd" 8  } } */
-/* { dg-final { scan-assembler-times "vfnmadd132pd" 8  } } */
-/* { dg-final { scan-assembler-times "vfnmsub132pd" 8  } } */
-/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56  } } */
+/* { dg-final { scan-assembler-times "vfmadd\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */
 /* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */
 /* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */
 /* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 56 } } */

diff --git a/gcc/testsuite/gcc.target/i386/l_fma_double_3.c b/gcc/testsuite/gcc.target/i386/l_fma_double_3.c
index 1cfaa4ae3f6c68ff816ea16755831b546a436ebd..f099e25f8edb7f4ee79e740510a7e17761ca0f9e 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/l_fma_double_3.c
+++ b/gcc/testsuite/gcc.target/i386/l_fma_double_3.c
@@ -9,14 +9,10 @@ typedef double adouble __attribute__((aligned(sizeof (double))));
 
 #include "l_fma_3.h"
 
-/* { dg-final { scan-assembler-times "vfmadd132pd" 4  } } */
-/* { dg-final { scan-assembler-times "vfmadd231pd" 4  } } */
-/* { dg-final { scan-assembler-times "vfmsub132pd" 4  } } */
-/* { dg-final { scan-assembler-times "vfmsub231pd" 4  } } */
-/* { dg-final { scan-assembler-times "vfnmadd132pd" 4  } } */
-/* { dg-final { scan-assembler-times "vfnmadd231pd" 4  } } */
-/* { dg-final { scan-assembler-times "vfnmsub132pd" 4  } } */
-/* { dg-final { scan-assembler-times "vfnmsub231pd" 4  } } */
+/* { dg-final { scan-assembler-times "vfmadd\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+pd" 8 } } */
 /* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */
 /* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */
 /* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */

diff --git a/gcc/testsuite/gcc.target/i386/l_fma_double_4.c b/gcc/testsuite/gcc.target/i386/l_fma_double_4.c
index 4e6353366022d6c10897bca8ac831ec8e1bfe502..969f31c7f3545d30733c36acf70922d1769ffee1 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/l_fma_double_4.c
+++ b/gcc/testsuite/gcc.target/i386/l_fma_double_4.c
@@ -9,10 +9,10 @@ typedef double adouble __attribute__((aligned(sizeof (double))));
 
 #include "l_fma_4.h"
 
-/* { dg-final { scan-assembler-times "vfmadd132pd" 8  } } */
-/* { dg-final { scan-assembler-times "vfmsub132pd" 8  } } */
-/* { dg-final { scan-assembler-times "vfnmadd132pd" 8  } } */
-/* { dg-final { scan-assembler-times "vfnmsub132pd" 8  } } */
+/* { dg-final { scan-assembler-times "vfmadd\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+pd" 8 } } */
 /* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */
 /* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */
 /* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */

diff --git a/gcc/testsuite/gcc.target/i386/l_fma_double_5.c b/gcc/testsuite/gcc.target/i386/l_fma_double_5.c
index 4153cf82ce07217a1871aa7ab3558fee65d5e7e2..85ccdd0da44419f26f9f13c684dea24cda97fee2 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/l_fma_double_5.c
+++ b/gcc/testsuite/gcc.target/i386/l_fma_double_5.c
@@ -9,11 +9,11 @@ typedef double adouble __attribute__((aligned(sizeof (double))));
 
 #include "l_fma_5.h"
 
-/* { dg-final { scan-assembler-times "vfmadd132pd" 8  } } */
-/* { dg-final { scan-assembler-times "vfmsub132pd" 8  } } */
-/* { dg-final { scan-assembler-times "vfnmadd132pd" 8  } } */
-/* { dg-final { scan-assembler-times "vfnmsub132pd" 8  } } */
+/* { dg-final { scan-assembler-times "vfmadd\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+pd" 8 } } */
 /* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */
-/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56  } } */
-/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56  } } */
-/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 56  } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 56 } } */

diff --git a/gcc/testsuite/gcc.target/i386/l_fma_double_6.c b/gcc/testsuite/gcc.target/i386/l_fma_double_6.c
index ea12370d8ea716ecc5be5cf752dc3fa70d131cc6..019ed9ad0283e19f476d91f9d9885a58a109aaa4 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/l_fma_double_6.c
+++ b/gcc/testsuite/gcc.target/i386/l_fma_double_6.c
@@ -9,11 +9,11 @@ typedef double adouble __attribute__((aligned(sizeof (double))));
 
 #include "l_fma_6.h"
 
-/* { dg-final { scan-assembler-times "vfmadd132pd" 8  } } */
-/* { dg-final { scan-assembler-times "vfmsub132pd" 8  } } */
-/* { dg-final { scan-assembler-times "vfnmadd132pd" 8  } } */
-/* { dg-final { scan-assembler-times "vfnmsub132pd" 8  } } */
+/* { dg-final { scan-assembler-times "vfmadd\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+pd" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+pd" 8 } } */
 /* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */
-/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56  } } */
-/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56  } } */
-/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 56  } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 56 } } */

diff --git a/gcc/testsuite/gcc.target/i386/l_fma_float_1.c b/gcc/testsuite/gcc.target/i386/l_fma_float_1.c
index fa6a9334e83bf28cefb5881864b066ed47d89db8..d1913d7683f78043c4e1ff8159b96f1451c3a74f 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/l_fma_float_1.c
+++ b/gcc/testsuite/gcc.target/i386/l_fma_float_1.c
@@ -8,14 +8,10 @@
 
 #include "l_fma_1.h"
 
-/* { dg-final { scan-assembler-times "vfmadd132ps" 4  } } */
-/* { dg-final { scan-assembler-times "vfmadd231ps" 4  } } */
-/* { dg-final { scan-assembler-times "vfmsub132ps" 4  } } */
-/* { dg-final { scan-assembler-times "vfmsub231ps" 4  } } */
-/* { dg-final { scan-assembler-times "vfnmadd132ps" 4  } } */
-/* { dg-final { scan-assembler-times "vfnmadd231ps" 4  } } */
-/* { dg-final { scan-assembler-times "vfnmsub132ps" 4  } } */
-/* { dg-final { scan-assembler-times "vfnmsub231ps" 4  } } */
+/* { dg-final { scan-assembler-times "vfmadd\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ps" 8 } } */
 /* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */
 /* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */
 /* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */

diff --git a/gcc/testsuite/gcc.target/i386/l_fma_float_2.c b/gcc/testsuite/gcc.target/i386/l_fma_float_2.c
index 1fd0a08c1f998532d33da674b1331e96ffda7a2b..5e0142545c8618baf177b8d1fc831cfe52ac9664 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/l_fma_float_2.c
+++ b/gcc/testsuite/gcc.target/i386/l_fma_float_2.c
@@ -8,11 +8,11 @@
 
 #include "l_fma_2.h"
 
-/* { dg-final { scan-assembler-times "vfmadd132ps" 8  } } */
-/* { dg-final { scan-assembler-times "vfmsub132ps" 8  } } */
-/* { dg-final { scan-assembler-times "vfnmadd132ps" 8  } } */
-/* { dg-final { scan-assembler-times "vfnmsub132ps" 8  } } */
-/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120  } } */
-/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120  } } */
-/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120  } } */
-/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120  } } */
+/* { dg-final { scan-assembler-times "vfmadd\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */

diff --git a/gcc/testsuite/gcc.target/i386/l_fma_float_3.c b/gcc/testsuite/gcc.target/i386/l_fma_float_3.c
index 7bafd967308dff09872a25e5dce058c4d56b147a..7b9e3f54528353ec8b780b9f983ac4d4c006356b 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/l_fma_float_3.c
+++ b/gcc/testsuite/gcc.target/i386/l_fma_float_3.c
@@ -8,15 +8,11 @@
 
 #include "l_fma_3.h"
 
-/* { dg-final { scan-assembler-times "vfmadd132ps" 4  } } */
-/* { dg-final { scan-assembler-times "vfmadd231ps" 4  } } */
-/* { dg-final { scan-assembler-times "vfmsub132ps" 4  } } */
-/* { dg-final { scan-assembler-times "vfmsub231ps" 4  } } */
-/* { dg-final { scan-assembler-times "vfnmadd132ps" 4  } } */
-/* { dg-final { scan-assembler-times "vfnmadd231ps" 4  } } */
-/* { dg-final { scan-assembler-times "vfnmsub132ps" 4  } } */
-/* { dg-final { scan-assembler-times "vfnmsub231ps" 4  } } */
-/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120  } } */
-/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120  } } */
-/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120  } } */
-/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120  } } */
+/* { dg-final { scan-assembler-times "vfmadd\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */

diff --git a/gcc/testsuite/gcc.target/i386/l_fma_float_4.c b/gcc/testsuite/gcc.target/i386/l_fma_float_4.c
index 5a9d039de60cbbfc953723de11ad2fc9571ff919..cc675c14aae471915f354b1ba6136f48cd990d62 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/l_fma_float_4.c
+++ b/gcc/testsuite/gcc.target/i386/l_fma_float_4.c
@@ -8,11 +8,11 @@
 
 #include "l_fma_4.h"
 
-/* { dg-final { scan-assembler-times "vfmadd132ps" 8  } } */
-/* { dg-final { scan-assembler-times "vfmsub132ps" 8  } } */
-/* { dg-final { scan-assembler-times "vfnmadd132ps" 8  } } */
-/* { dg-final { scan-assembler-times "vfnmsub132ps" 8  } } */
-/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120  } } */
-/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120  } } */
-/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120  } } */
-/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120  } } */
+/* { dg-final { scan-assembler-times "vfmadd\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */

diff --git a/gcc/testsuite/gcc.target/i386/l_fma_float_5.c b/gcc/testsuite/gcc.target/i386/l_fma_float_5.c
index be9909da6e7d784c24c168071ff7a873bdd5b232..ac0b361475ad47e46fa57d06a593521088ef52f5 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/l_fma_float_5.c
+++ b/gcc/testsuite/gcc.target/i386/l_fma_float_5.c
@@ -8,11 +8,11 @@
 
 #include "l_fma_5.h"
 
-/* { dg-final { scan-assembler-times "vfmadd132ps" 8  } } */
-/* { dg-final { scan-assembler-times "vfmsub132ps" 8  } } */
-/* { dg-final { scan-assembler-times "vfnmadd132ps" 8  } } */
-/* { dg-final { scan-assembler-times "vfnmsub132ps" 8  } } */
-/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120  } } */
-/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120  } } */
-/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120  } } */
-/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120  } } */
+/* { dg-final { scan-assembler-times "vfmadd\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */

diff --git a/gcc/testsuite/gcc.target/i386/l_fma_float_6.c b/gcc/testsuite/gcc.target/i386/l_fma_float_6.c
index 9fdcfda27a270e70dae3651d8059720c1cd5b6f6..c84ac1196b427e805d56a16e72d09bff26a08f4f 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/l_fma_float_6.c
+++ b/gcc/testsuite/gcc.target/i386/l_fma_float_6.c
@@ -8,11 +8,11 @@
 
 #include "l_fma_6.h"
 
-/* { dg-final { scan-assembler-times "vfmadd132ps" 8  } } */
-/* { dg-final { scan-assembler-times "vfmsub132ps" 8  } } */
-/* { dg-final { scan-assembler-times "vfnmadd132ps" 8  } } */
-/* { dg-final { scan-assembler-times "vfnmsub132ps" 8  } } */
+/* { dg-final { scan-assembler-times "vfmadd\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ps" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ps" 8 } } */
 /* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */
-/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120  } } */
-/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120  } } */
-/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120  } } */
+/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */
+/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */
+/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */