i965: Remove VS constant buffer read support from brw_eu_emit.c.

brw_vec4_emit.cpp implements this directly; only the old backend used
the brw_eu_emit.c code.

Reviewed-by: Eric Anholt <eric@anholt.net>

diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index c35c86084ee93cca3ae4a7a07be6b6dd0a46bcd1..fce4f15fbabe3a6d4b2be8cf20573866f6b8888d 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -1005,17 +1005,6 @@ void brw_oword_block_write_scratch(struct brw_compile *p,
                                   int num_regs,
                                   GLuint offset);
 
-void brw_dp_READ_4_vs( struct brw_compile *p,
-                       struct brw_reg dest,
-                       GLuint location,
-                       GLuint bind_table_index );
-
-void brw_dp_READ_4_vs_relative(struct brw_compile *p,
-                              struct brw_reg dest,
-                              struct brw_reg addrReg,
-                              GLuint offset,
-                              GLuint bind_table_index);
-
 /* If/else/endif.  Works by manipulating the execution flags on each
  * channel.
  */

diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 64dacde2a0d2c10386da9e78ffa43f26bbae8bc4..3d95b92623536a76f841d8d03f5b96cf03611c52 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -2015,116 +2015,6 @@ void brw_oword_block_read(struct brw_compile *p,
 }
 
 
-/**
- * Read float[4] constant(s) from VS constant buffer.
- * For relative addressing, two float[4] constants will be read into 'dest'.
- * Otherwise, one float[4] constant will be read into the lower half of 'dest'.
- */
-void brw_dp_READ_4_vs(struct brw_compile *p,
-                      struct brw_reg dest,
-                      GLuint location,
-                      GLuint bind_table_index)
-{
-   struct intel_context *intel = &p->brw->intel;
-   struct brw_instruction *insn;
-   GLuint msg_reg_nr = 1;
-
-   if (intel->gen >= 6)
-      location /= 16;
-
-   /* Setup MRF[1] with location/offset into const buffer */
-   brw_push_insn_state(p);
-   brw_set_access_mode(p, BRW_ALIGN_1);
-   brw_set_compression_control(p, BRW_COMPRESSION_NONE);
-   brw_set_mask_control(p, BRW_MASK_DISABLE);
-   brw_set_predicate_control(p, BRW_PREDICATE_NONE);
-   brw_MOV(p, retype(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, msg_reg_nr, 2),
-                    BRW_REGISTER_TYPE_UD),
-          brw_imm_ud(location));
-   brw_pop_insn_state(p);
-
-   insn = next_insn(p, BRW_OPCODE_SEND);
-
-   insn->header.predicate_control = BRW_PREDICATE_NONE;
-   insn->header.compression_control = BRW_COMPRESSION_NONE;
-   insn->header.destreg__conditionalmod = msg_reg_nr;
-   insn->header.mask_control = BRW_MASK_DISABLE;
-
-   brw_set_dest(p, insn, dest);
-   if (intel->gen >= 6) {
-      brw_set_src0(p, insn, brw_message_reg(msg_reg_nr));
-   } else {
-      brw_set_src0(p, insn, brw_null_reg());
-   }
-
-   brw_set_dp_read_message(p,
-                          insn,
-                          bind_table_index,
-                          0,
-                          BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ, /* msg_type */
-                          BRW_DATAPORT_READ_TARGET_DATA_CACHE,
-                          1, /* msg_length */
-                          1); /* response_length (1 Oword) */
-}
-
-/**
- * Read a float[4] constant per vertex from VS constant buffer, with
- * relative addressing.
- */
-void brw_dp_READ_4_vs_relative(struct brw_compile *p,
-                              struct brw_reg dest,
-                              struct brw_reg addr_reg,
-                              GLuint offset,
-                              GLuint bind_table_index)
-{
-   struct intel_context *intel = &p->brw->intel;
-   struct brw_reg src = brw_vec8_grf(0, 0);
-   int msg_type;
-
-   /* Setup MRF[1] with offset into const buffer */
-   brw_push_insn_state(p);
-   brw_set_access_mode(p, BRW_ALIGN_1);
-   brw_set_compression_control(p, BRW_COMPRESSION_NONE);
-   brw_set_mask_control(p, BRW_MASK_DISABLE);
-   brw_set_predicate_control(p, BRW_PREDICATE_NONE);
-
-   /* M1.0 is block offset 0, M1.4 is block offset 1, all other
-    * fields ignored.
-    */
-   brw_ADD(p, retype(brw_message_reg(1), BRW_REGISTER_TYPE_D),
-          addr_reg, brw_imm_d(offset));
-   brw_pop_insn_state(p);
-
-   gen6_resolve_implied_move(p, &src, 0);
-   struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND);
-
-   insn->header.predicate_control = BRW_PREDICATE_NONE;
-   insn->header.compression_control = BRW_COMPRESSION_NONE;
-   insn->header.destreg__conditionalmod = 0;
-   insn->header.mask_control = BRW_MASK_DISABLE;
-
-   brw_set_dest(p, insn, dest);
-   brw_set_src0(p, insn, src);
-
-   if (intel->gen >= 6)
-      msg_type = GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ;
-   else if (intel->gen == 5 || intel->is_g4x)
-      msg_type = G45_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ;
-   else
-      msg_type = BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ;
-
-   brw_set_dp_read_message(p,
-                          insn,
-                          bind_table_index,
-                          BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD,
-                          msg_type,
-                          BRW_DATAPORT_READ_TARGET_DATA_CACHE,
-                          2, /* msg_length */
-                          1); /* response_length */
-}
-
-
-
 void brw_fb_WRITE(struct brw_compile *p,
                  int dispatch_width,
                   GLuint msg_reg_nr,