Fixed temp net name generation in rtlil process generator for abbreviated name matching

diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc
index 8aea05969336a788c5210e051ef05c0c335b76b8..1453d13a95c4a83c99cc44f96aabf3828b654b66 100644 (file)
--- a/frontends/ast/genrtlil.cc
+++ b/frontends/ast/genrtlil.cc
@@ -361,6 +361,8 @@ struct AST_INTERNAL::ProcessGenerator
                        do {
                                wire->name = stringf("$%d%s[%d:%d]", new_temp_count[chunk.wire]++,
                                                chunk.wire->name.c_str(), chunk.width+chunk.offset-1, chunk.offset);;
+                               if (chunk.wire->name.find('$') != std::string::npos)
+                                       wire->name += stringf("$%d", RTLIL::autoidx++);
                        } while (current_module->wires.count(wire->name) > 0);
                        wire->width = chunk.width;
                        current_module->wires[wire->name] = wire;