;;
(define_constants
- [; GOT/PLT and lt-relative accesses
+ [; Miscellaneous
+ (UNSPEC_ROUND 1)
+ (UNSPEC_SETHIGH 10)
+
+ ; GOT/PLT and lt-relative accesses
(UNSPEC_LTREL_OFFSET 100)
(UNSPEC_LTREL_BASE 101)
(UNSPEC_GOTENT 110)
;;
(define_constants
- [; Literal pool
+ [; Blockage
+ (UNSPECV_BLOCKAGE 0)
+
+ ; Literal pool
(UNSPECV_POOL 200)
(UNSPECV_POOL_START 201)
(UNSPECV_POOL_END 202)
(compare:CC (match_operand:DI 0 "register_operand" "")
(match_operand:DI 1 "general_operand" "")))]
"TARGET_64BIT"
- "
{
s390_compare_op0 = operands[0];
s390_compare_op1 = operands[1];
DONE;
-}")
+})
(define_expand "cmpsi"
[(set (reg:CC 33)
(compare:CC (match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "general_operand" "")))]
""
- "
{
s390_compare_op0 = operands[0];
s390_compare_op1 = operands[1];
DONE;
-}")
+})
(define_expand "cmpdf"
[(set (reg:CC 33)
(compare:CC (match_operand:DF 0 "register_operand" "")
(match_operand:DF 1 "general_operand" "")))]
"TARGET_HARD_FLOAT"
- "
{
s390_compare_op0 = operands[0];
s390_compare_op1 = operands[1];
DONE;
-}")
+})
(define_expand "cmpsf"
[(set (reg:CC 33)
(compare:CC (match_operand:SF 0 "register_operand" "")
(match_operand:SF 1 "general_operand" "")))]
"TARGET_HARD_FLOAT"
- "
{
s390_compare_op0 = operands[0];
s390_compare_op1 = operands[1];
DONE;
-}")
+})
; Test-under-Mask (zero_extract) instructions
&& INTVAL (operands[1]) + INTVAL (operands[2]) <= 64
&& (INTVAL (operands[1]) + INTVAL (operands[2]) - 1) >> 4
== INTVAL (operands[2]) >> 4"
- "*
{
int part = INTVAL (operands[2]) >> 4;
int block = (1 << INTVAL (operands[1])) - 1;
switch (part)
{
- case 0: return \"tmhh\\t%0,%x2\";
- case 1: return \"tmhl\\t%0,%x2\";
- case 2: return \"tmlh\\t%0,%x2\";
- case 3: return \"tmll\\t%0,%x2\";
+ case 0: return "tmhh\\t%0,%x2";
+ case 1: return "tmhl\\t%0,%x2";
+ case 2: return "tmlh\\t%0,%x2";
+ case 3: return "tmll\\t%0,%x2";
default: abort ();
}
-}"
+}
[(set_attr "op_type" "RI")])
(define_insn "*tmsi_ext"
&& INTVAL (operands[1]) + INTVAL (operands[2]) <= 32
&& (INTVAL (operands[1]) + INTVAL (operands[2]) - 1) >> 4
== INTVAL (operands[2]) >> 4"
- "*
{
int part = INTVAL (operands[2]) >> 4;
int block = (1 << INTVAL (operands[1])) - 1;
switch (part)
{
- case 0: return \"tmh\\t%0,%x2\";
- case 1: return \"tml\\t%0,%x2\";
+ case 0: return "tmh\\t%0,%x2";
+ case 1: return "tml\\t%0,%x2";
default: abort ();
}
-}"
+}
[(set_attr "op_type" "RI")])
(define_insn "*tmqi_ext"
"s390_match_ccmode(insn, CCTmode)
&& INTVAL (operands[1]) >= 1 && INTVAL (operands[2]) >= 0
&& INTVAL (operands[1]) + INTVAL (operands[2]) <= 8"
- "*
{
int block = (1 << INTVAL (operands[1])) - 1;
int shift = 8 - INTVAL (operands[1]) - INTVAL (operands[2]);
operands[2] = GEN_INT (block << shift);
- return which_alternative == 0 ? \"tm\\t%0,%b2\" : \"tmy\\t%0,%b2\";
-}"
+ return which_alternative == 0 ? "tm\\t%0,%b2" : "tmy\\t%0,%b2";
+}
[(set_attr "op_type" "SI,SIY")])
; Test-under-Mask instructions
"TARGET_64BIT
&& s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 0))
&& s390_single_qi (operands[1], DImode, 0) >= 0"
- "*
{
int part = s390_single_qi (operands[1], DImode, 0);
operands[1] = GEN_INT (s390_extract_qi (operands[1], DImode, part));
operands[0] = gen_rtx_MEM (QImode,
plus_constant (XEXP (operands[0], 0), part));
- return which_alternative == 0 ? \"tm\\t%0,%b1\" : \"tmy\\t%0,%b1\";
-}"
+ return which_alternative == 0 ? "tm\\t%0,%b1" : "tmy\\t%0,%b1";
+}
[(set_attr "op_type" "SI,SIY")])
(define_insn "*tmsi_mem"
(match_operand:SI 2 "immediate_operand" "n,n")))]
"s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 0))
&& s390_single_qi (operands[1], SImode, 0) >= 0"
- "*
{
int part = s390_single_qi (operands[1], SImode, 0);
operands[1] = GEN_INT (s390_extract_qi (operands[1], SImode, part));
operands[0] = gen_rtx_MEM (QImode,
plus_constant (XEXP (operands[0], 0), part));
- return which_alternative == 0 ? \"tm\\t%0,%b1\" : \"tmy\\t%0,%b1\";
-}"
+ return which_alternative == 0 ? "tm\\t%0,%b1" : "tmy\\t%0,%b1";
+}
[(set_attr "op_type" "SI")])
(define_insn "*tmhi_mem"
(match_operand:SI 2 "immediate_operand" "n,n")))]
"s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 0))
&& s390_single_qi (operands[1], HImode, 0) >= 0"
- "*
{
int part = s390_single_qi (operands[1], HImode, 0);
operands[1] = GEN_INT (s390_extract_qi (operands[1], HImode, part));
operands[0] = gen_rtx_MEM (QImode,
plus_constant (XEXP (operands[0], 0), part));
- return which_alternative == 0 ? \"tm\\t%0,%b1\" : \"tmy\\t%0,%b1\";
-}"
+ return which_alternative == 0 ? "tm\\t%0,%b1" : "tmy\\t%0,%b1";
+}
[(set_attr "op_type" "SI")])
(define_insn "*tmqi_mem"
"TARGET_64BIT
&& s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 1))
&& s390_single_hi (operands[1], DImode, 0) >= 0"
- "*
{
int part = s390_single_hi (operands[1], DImode, 0);
operands[1] = GEN_INT (s390_extract_hi (operands[1], DImode, part));
switch (part)
{
- case 0: return \"tmhh\\t%0,%x1\";
- case 1: return \"tmhl\\t%0,%x1\";
- case 2: return \"tmlh\\t%0,%x1\";
- case 3: return \"tmll\\t%0,%x1\";
+ case 0: return "tmhh\\t%0,%x1";
+ case 1: return "tmhl\\t%0,%x1";
+ case 2: return "tmlh\\t%0,%x1";
+ case 3: return "tmll\\t%0,%x1";
default: abort ();
}
-}"
+}
[(set_attr "op_type" "RI")])
(define_insn "*tmsi_reg"
(match_operand:SI 2 "immediate_operand" "n")))]
"s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 1))
&& s390_single_hi (operands[1], SImode, 0) >= 0"
- "*
{
int part = s390_single_hi (operands[1], SImode, 0);
operands[1] = GEN_INT (s390_extract_hi (operands[1], SImode, part));
switch (part)
{
- case 0: return \"tmh\\t%0,%x1\";
- case 1: return \"tml\\t%0,%x1\";
+ case 0: return "tmh\\t%0,%x1";
+ case 1: return "tml\\t%0,%x1";
default: abort ();
}
-}"
+}
[(set_attr "op_type" "RI")])
(define_insn "*tmhi_full"
[(set (match_operand:DI 0 "general_operand" "")
(match_operand:DI 1 "general_operand" ""))]
""
- "
{
/* Handle symbolic constants. */
if (TARGET_64BIT && SYMBOLIC_CONST (operands[1]))
&& (!legitimate_reload_constant_p (operands[1])
|| FP_REG_P (operands[0])))
operands[1] = force_const_mem (DImode, operands[1]);
-}")
+})
(define_insn "*movdi_lhi"
[(set (match_operand:DI 0 "register_operand" "=d")
(match_operand:DI 1 "immediate_operand" "n"))]
"TARGET_64BIT && s390_single_hi (operands[1], DImode, 0) >= 0
&& !FP_REG_P (operands[0])"
- "*
{
int part = s390_single_hi (operands[1], DImode, 0);
operands[1] = GEN_INT (s390_extract_hi (operands[1], DImode, part));
switch (part)
{
- case 0: return \"llihh\\t%0,%x1\";
- case 1: return \"llihl\\t%0,%x1\";
- case 2: return \"llilh\\t%0,%x1\";
- case 3: return \"llill\\t%0,%x1\";
+ case 0: return "llihh\\t%0,%x1";
+ case 1: return "llihl\\t%0,%x1";
+ case 2: return "llilh\\t%0,%x1";
+ case 3: return "llill\\t%0,%x1";
default: abort ();
}
-}"
+}
[(set_attr "op_type" "RI")])
(define_insn "*movdi_lay"
[(set (match_operand:SI 0 "general_operand" "")
(match_operand:SI 1 "general_operand" ""))]
""
- "
{
/* Handle symbolic constants. */
if (!TARGET_64BIT && SYMBOLIC_CONST (operands[1]))
&& (!legitimate_reload_constant_p (operands[1])
|| FP_REG_P (operands[0])))
operands[1] = force_const_mem (SImode, operands[1]);
-}")
+})
(define_insn "*movsi_lhi"
[(set (match_operand:SI 0 "register_operand" "=d")
(match_operand:SI 1 "immediate_operand" "n"))]
"TARGET_64BIT && s390_single_hi (operands[1], SImode, 0) >= 0
&& !FP_REG_P (operands[0])"
- "*
{
int part = s390_single_hi (operands[1], SImode, 0);
operands[1] = GEN_INT (s390_extract_hi (operands[1], SImode, part));
switch (part)
{
- case 0: return \"llilh\\t%0,%x1\";
- case 1: return \"llill\\t%0,%x1\";
+ case 0: return "llilh\\t%0,%x1";
+ case 1: return "llill\\t%0,%x1";
default: abort ();
}
-}"
+}
[(set_attr "op_type" "RI")])
(define_insn "*movsi_lay"
[(set (match_operand:DF 0 "nonimmediate_operand" "")
(match_operand:DF 1 "general_operand" ""))]
""
- "
{
/* During and after reload, we need to force constants
to the literal pool ourselves, if necessary. */
if ((reload_in_progress || reload_completed)
&& CONSTANT_P (operands[1]))
operands[1] = force_const_mem (DFmode, operands[1]);
-}")
+})
(define_insn "*movdf_64"
[(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,f,R,T,d,d,m,?Q")
[(set (match_operand:SF 0 "nonimmediate_operand" "")
(match_operand:SF 1 "general_operand" ""))]
""
- "
{
/* During and after reload, we need to force constants
to the literal pool ourselves, if necessary. */
if ((reload_in_progress || reload_completed)
&& CONSTANT_P (operands[1]))
operands[1] = force_const_mem (SFmode, operands[1]);
-}")
+})
(define_insn "*movsf"
[(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,f,R,T,d,d,d,R,T,?Q")
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))])]
""
- "
{
int regno;
int count;
change_address (operands[1], Pmode,
plus_constant (from,
off + i * UNITS_PER_WORD)));
-}")
+})
(define_insn "*load_multiple_di"
[(match_parallel 0 "load_multiple_operation"
[(set (match_operand:DI 1 "register_operand" "=r")
(match_operand:DI 2 "s_operand" "QS"))])]
""
- "*
{
int words = XVECLEN (operands[0], 0);
operands[0] = gen_rtx_REG (DImode, REGNO (operands[1]) + words - 1);
- return \"lmg\\t%1,%0,%2\";
-}"
+ return "lmg\\t%1,%0,%2";
+}
[(set_attr "op_type" "RSY")
(set_attr "type" "lm")])
[(set (match_operand:SI 1 "register_operand" "=r,r")
(match_operand:SI 2 "s_operand" "Q,S"))])]
""
- "*
{
int words = XVECLEN (operands[0], 0);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[1]) + words - 1);
- return which_alternative == 0 ? \"lm\\t%1,%0,%2\" : \"lmy\\t%1,%0,%2\";
-}"
+ return which_alternative == 0 ? "lm\\t%1,%0,%2" : "lmy\\t%1,%0,%2";
+}
[(set_attr "op_type" "RS,RSY")
(set_attr "type" "lm")])
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))])]
""
- "
{
int regno;
int count;
plus_constant (to,
off + i * UNITS_PER_WORD)),
gen_rtx_REG (Pmode, regno + i));
-}")
+})
(define_insn "*store_multiple_di"
[(match_parallel 0 "store_multiple_operation"
[(set (match_operand:DI 1 "s_operand" "=QS")
(match_operand:DI 2 "register_operand" "r"))])]
""
- "*
{
int words = XVECLEN (operands[0], 0);
operands[0] = gen_rtx_REG (DImode, REGNO (operands[2]) + words - 1);
- return \"stmg\\t%2,%0,%1\";
-}"
+ return "stmg\\t%2,%0,%1";
+}
[(set_attr "op_type" "RSY")
(set_attr "type" "stm")])
[(set (match_operand:SI 1 "s_operand" "=Q,S")
(match_operand:SI 2 "register_operand" "r,r"))])]
""
- "*
{
int words = XVECLEN (operands[0], 0);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[2]) + words - 1);
- return which_alternative == 0 ? \"stm\\t%2,%0,%1\" : \"stmy\\t%2,%0,%1\";
-}"
+ return which_alternative == 0 ? "stm\\t%2,%0,%1" : "stmy\\t%2,%0,%1";
+}
[(set_attr "op_type" "RS,RSY")
(set_attr "type" "stm")])
(use (match_operand:DI 2 "nonmemory_operand" "n,a"))
(clobber (match_scratch:DI 3 "=X,&a"))]
"TARGET_64BIT"
- "*
{
switch (which_alternative)
{
case 0:
- return \"mvc\\t%O0(%b2+1,%R0),%1\";
+ return "mvc\\t%O0(%b2+1,%R0),%1";
case 1:
- output_asm_insn (\"bras\\t%3,.+10\", operands);
- output_asm_insn (\"mvc\\t%O0(1,%R0),%1\", operands);
- return \"ex\\t%2,0(%3)\";
+ output_asm_insn ("bras\\t%3,.+10", operands);
+ output_asm_insn ("mvc\\t%O0(1,%R0),%1", operands);
+ return "ex\\t%2,0(%3)";
default:
abort ();
}
-}"
+}
[(set_attr "op_type" "SS,NN")
(set_attr "type" "cs,cs")
(set_attr "atype" "*,agen")
(use (match_operand:SI 2 "nonmemory_operand" "n,a"))
(clobber (match_scratch:SI 3 "=X,&a"))]
"!TARGET_64BIT"
- "*
{
switch (which_alternative)
{
case 0:
- return \"mvc\\t%O0(%b2+1,%R0),%1\";
+ return "mvc\\t%O0(%b2+1,%R0),%1";
case 1:
- output_asm_insn (\"bras\\t%3,.+10\", operands);
- output_asm_insn (\"mvc\\t%O0(1,%R0),%1\", operands);
- return \"ex\\t%2,0(%3)\";
+ output_asm_insn ("bras\\t%3,.+10", operands);
+ output_asm_insn ("mvc\\t%O0(1,%R0),%1", operands);
+ return "ex\\t%2,0(%3)";
default:
abort ();
}
-}"
+}
[(set_attr "op_type" "SS,NN")
(set_attr "type" "cs,cs")
(set_attr "atype" "*,agen")
(clobber (match_scratch:DI 2 "=X,&a"))
(clobber (reg:CC 33))]
"TARGET_64BIT"
- "*
{
switch (which_alternative)
{
case 0:
- return \"xc\\t%O0(%b1+1,%R0),%0\";
+ return "xc\\t%O0(%b1+1,%R0),%0";
case 1:
- output_asm_insn (\"bras\\t%2,.+10\", operands);
- output_asm_insn (\"xc\\t%O0(1,%R0),%0\", operands);
- return \"ex\\t%1,0(%2)\";
+ output_asm_insn ("bras\\t%2,.+10", operands);
+ output_asm_insn ("xc\\t%O0(1,%R0),%0", operands);
+ return "ex\\t%1,0(%2)";
default:
abort ();
}
-}"
+}
[(set_attr "op_type" "SS,NN")
(set_attr "type" "cs,cs")
(set_attr "atype" "*,agen")
(clobber (match_scratch:SI 2 "=X,&a"))
(clobber (reg:CC 33))]
"!TARGET_64BIT"
- "*
{
switch (which_alternative)
{
case 0:
- return \"xc\\t%O0(%b1+1,%R0),%0\";
+ return "xc\\t%O0(%b1+1,%R0),%0";
case 1:
- output_asm_insn (\"bras\\t%2,.+10\", operands);
- output_asm_insn (\"xc\\t%O0(1,%R0),%0\", operands);
- return \"ex\\t%1,0(%2)\";
+ output_asm_insn ("bras\\t%2,.+10", operands);
+ output_asm_insn ("xc\\t%O0(1,%R0),%0", operands);
+ return "ex\\t%1,0(%2)";
default:
abort ();
}
-}"
+}
[(set_attr "op_type" "SS,NN")
(set_attr "type" "cs,cs")
(set_attr "atype" "*,agen")
(use (match_operand:DI 2 "nonmemory_operand" "n,a"))
(clobber (match_scratch:DI 3 "=X,&a"))]
"TARGET_64BIT"
- "*
{
switch (which_alternative)
{
case 0:
- return \"clc\\t%O0(%b2+1,%R0),%1\";
+ return "clc\\t%O0(%b2+1,%R0),%1";
case 1:
- output_asm_insn (\"bras\\t%3,.+10\", operands);
- output_asm_insn (\"clc\\t%O0(1,%R0),%1\", operands);
- return \"ex\\t%2,0(%3)\";
+ output_asm_insn ("bras\\t%3,.+10", operands);
+ output_asm_insn ("clc\\t%O0(1,%R0),%1", operands);
+ return "ex\\t%2,0(%3)";
default:
abort ();
}
-}"
+}
[(set_attr "op_type" "SS,NN")
(set_attr "type" "cs,cs")
(set_attr "atype" "*,agen")
(use (match_operand:SI 2 "nonmemory_operand" "n,a"))
(clobber (match_scratch:SI 3 "=X,&a"))]
"!TARGET_64BIT"
- "*
{
switch (which_alternative)
{
case 0:
- return \"clc\\t%O0(%b2+1,%R0),%1\";
+ return "clc\\t%O0(%b2+1,%R0),%1";
case 1:
- output_asm_insn (\"bras\\t%3,.+10\", operands);
- output_asm_insn (\"clc\\t%O0(1,%R0),%1\", operands);
- return \"ex\\t%2,0(%3)\";
+ output_asm_insn ("bras\\t%3,.+10", operands);
+ output_asm_insn ("clc\\t%O0(1,%R0),%1", operands);
+ return "ex\\t%2,0(%3)";
default:
abort ();
}
-}"
+}
[(set_attr "op_type" "SS,NN")
(set_attr "type" "cs,cs")
(set_attr "atype" "*,agen")
[(set (match_operand:SI 0 "register_operand" "=d")
(compare:SI (reg:CCS 33) (const_int 0)))]
""
- "*
{
- output_asm_insn (\"lhi\\t%0,1\", operands);
- output_asm_insn (\"jh\\t.+12\", operands);
- output_asm_insn (\"jl\\t.+6\", operands);
- output_asm_insn (\"sr\\t%0,%0\", operands);
- return \"lcr\\t%0,%0\";
-}"
+ output_asm_insn ("lhi\\t%0,1", operands);
+ output_asm_insn ("jh\\t.+12", operands);
+ output_asm_insn ("jl\\t.+6", operands);
+ output_asm_insn ("sr\\t%0,%0", operands);
+ return "lcr\\t%0,%0";
+}
[(set_attr "op_type" "NN")
(set_attr "length" "16")
(set_attr "type" "other")])
[(set (match_operand:DI 0 "register_operand" "=d")
(compare:DI (reg:CCS 33) (const_int 0)))]
"TARGET_64BIT"
- "*
{
- output_asm_insn (\"lghi\\t%0,1\", operands);
- output_asm_insn (\"jh\\t.+12\", operands);
- output_asm_insn (\"jl\\t.+6\", operands);
- output_asm_insn (\"sgr\\t%0,%0\", operands);
- return \"lcgr\\t%0,%0\";
-}"
+ output_asm_insn ("lghi\\t%0,1", operands);
+ output_asm_insn ("jh\\t.+12", operands);
+ output_asm_insn ("jl\\t.+6", operands);
+ output_asm_insn ("sgr\\t%0,%0", operands);
+ return "lcgr\\t%0,%0";
+}
[(set_attr "op_type" "NN")
(set_attr "length" "22")
(set_attr "type" "other")])
(define_insn "*sethighqisi"
[(set (match_operand:SI 0 "register_operand" "=d,d")
- (unspec:SI [(match_operand:QI 1 "s_operand" "Q,S")] 10))
+ (unspec:SI [(match_operand:QI 1 "s_operand" "Q,S")] UNSPEC_SETHIGH))
(clobber (reg:CC 33))]
""
"@
(define_insn "*sethighhisi"
[(set (match_operand:SI 0 "register_operand" "=d,d")
- (unspec:SI [(match_operand:HI 1 "s_operand" "Q,S")] 10))
+ (unspec:SI [(match_operand:HI 1 "s_operand" "Q,S")] UNSPEC_SETHIGH))
(clobber (reg:CC 33))]
""
"@
(define_insn "*sethighqidi_64"
[(set (match_operand:DI 0 "register_operand" "=d")
- (unspec:DI [(match_operand:QI 1 "s_operand" "QS")] 10))
+ (unspec:DI [(match_operand:QI 1 "s_operand" "QS")] UNSPEC_SETHIGH))
(clobber (reg:CC 33))]
"TARGET_64BIT"
"icmh\\t%0,8,%1"
(define_insn "*sethighqidi_31"
[(set (match_operand:DI 0 "register_operand" "=d,d")
- (unspec:DI [(match_operand:QI 1 "s_operand" "Q,S")] 10))
+ (unspec:DI [(match_operand:QI 1 "s_operand" "Q,S")] UNSPEC_SETHIGH))
(clobber (reg:CC 33))]
"!TARGET_64BIT"
"@
"#"
"&& reload_completed"
[(parallel
- [(set (match_dup 0) (unspec:SI [(match_dup 1)] 10))
+ [(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_SETHIGH))
(clobber (reg:CC 33))])
(set (match_dup 0) (lshiftrt:SI (match_dup 0) (match_dup 2)))]
- "
{
operands[2] = GEN_INT (32 - INTVAL (operands[2]));
operands[1] = change_address (operands[1], QImode, 0);
-}"
+}
[(set_attr "atype" "agen")])
(define_insn_and_split "*extracthi"
"#"
"&& reload_completed"
[(parallel
- [(set (match_dup 0) (unspec:SI [(match_dup 1)] 10))
+ [(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_SETHIGH))
(clobber (reg:CC 33))])
(set (match_dup 0) (lshiftrt:SI (match_dup 0) (match_dup 2)))]
- "
{
operands[2] = GEN_INT (32 - INTVAL (operands[2]));
operands[1] = change_address (operands[1], HImode, 0);
-}"
+}
[(set_attr "atype" "agen")])
;
(sign_extend:DI (match_operand:QI 1 "s_operand" "")))]
"TARGET_64BIT && !TARGET_LONG_DISPLACEMENT && !reload_completed"
[(parallel
- [(set (match_dup 0) (unspec:DI [(match_dup 1)] 10))
+ [(set (match_dup 0) (unspec:DI [(match_dup 1)] UNSPEC_SETHIGH))
(clobber (reg:CC 33))])
(parallel
[(set (match_dup 0) (ashiftrt:DI (match_dup 0) (const_int 56)))
(sign_extend:SI (match_operand:QI 1 "s_operand" "")))]
"(!TARGET_64BIT || !TARGET_LONG_DISPLACEMENT) && !reload_completed"
[(parallel
- [(set (match_dup 0) (unspec:SI [(match_dup 1)] 10))
+ [(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_SETHIGH))
(clobber (reg:CC 33))])
(parallel
[(set (match_dup 0) (ashiftrt:SI (match_dup 0) (const_int 24)))
[(set (match_operand:DI 0 "register_operand" "")
(unsigned_fix:DI (match_operand:DF 1 "register_operand" "")))]
"TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
- "
{
rtx label1 = gen_label_rtx ();
rtx label2 = gen_label_rtx ();
emit_insn (gen_cmpdf (operands[1],
CONST_DOUBLE_FROM_REAL_VALUE (
- REAL_VALUE_ATOF (\"9223372036854775808.0\", DFmode), DFmode)));
+ REAL_VALUE_ATOF ("9223372036854775808.0", DFmode), DFmode)));
emit_jump_insn (gen_blt (label1));
emit_insn (gen_subdf3 (temp, operands[1],
CONST_DOUBLE_FROM_REAL_VALUE (
- REAL_VALUE_ATOF (\"18446744073709551616.0\", DFmode), DFmode)));
+ REAL_VALUE_ATOF ("18446744073709551616.0", DFmode), DFmode)));
emit_insn (gen_fix_truncdfdi2_ieee (operands[0], temp, GEN_INT(7)));
emit_jump (label2);
emit_insn (gen_fix_truncdfdi2_ieee (operands[0], operands[1], GEN_INT(5)));
emit_label (label2);
DONE;
-}")
+})
(define_expand "fix_truncdfdi2"
[(set (match_operand:DI 0 "register_operand" "")
(fix:DI (match_operand:DF 1 "nonimmediate_operand" "")))]
"TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
- "
{
operands[1] = force_reg (DFmode, operands[1]);
emit_insn (gen_fix_truncdfdi2_ieee (operands[0], operands[1], GEN_INT(5)));
DONE;
-}")
+})
(define_insn "fix_truncdfdi2_ieee"
[(set (match_operand:DI 0 "register_operand" "=d")
(fix:DI (match_operand:DF 1 "register_operand" "f")))
- (unspec:DI [(match_operand:DI 2 "immediate_operand" "K")] 1)
+ (unspec:DI [(match_operand:DI 2 "immediate_operand" "K")] UNSPEC_ROUND)
(clobber (reg:CC 33))]
"TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"cgdbr\\t%0,%h2,%1"
[(set (match_operand:SI 0 "register_operand" "")
(unsigned_fix:SI (match_operand:DF 1 "register_operand" "")))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
- "
{
rtx label1 = gen_label_rtx ();
rtx label2 = gen_label_rtx ();
operands[1] = force_reg (DFmode,operands[1]);
emit_insn (gen_cmpdf (operands[1],
CONST_DOUBLE_FROM_REAL_VALUE (
- REAL_VALUE_ATOF (\"2147483648.0\", DFmode), DFmode)));
+ REAL_VALUE_ATOF ("2147483648.0", DFmode), DFmode)));
emit_jump_insn (gen_blt (label1));
emit_insn (gen_subdf3 (temp, operands[1],
CONST_DOUBLE_FROM_REAL_VALUE (
- REAL_VALUE_ATOF (\"4294967296.0\", DFmode), DFmode)));
+ REAL_VALUE_ATOF ("4294967296.0", DFmode), DFmode)));
emit_insn (gen_fix_truncdfsi2_ieee (operands[0], temp, GEN_INT (7)));
emit_jump (label2);
emit_insn (gen_fix_truncdfsi2_ieee (operands[0], operands[1], GEN_INT (5)));
emit_label (label2);
DONE;
-}")
+})
(define_expand "fix_truncdfsi2"
[(set (match_operand:SI 0 "register_operand" "")
(fix:SI (match_operand:DF 1 "nonimmediate_operand" "")))]
"TARGET_HARD_FLOAT"
- "
{
if (TARGET_IBM_FLOAT)
{
}
DONE;
-}")
+})
(define_insn "fix_truncdfsi2_ieee"
[(set (match_operand:SI 0 "register_operand" "=d")
(fix:SI (match_operand:DF 1 "register_operand" "f")))
- (unspec:SI [(match_operand:SI 2 "immediate_operand" "K")] 1)
+ (unspec:SI [(match_operand:SI 2 "immediate_operand" "K")] UNSPEC_ROUND)
(clobber (reg:CC 33))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"cfdbr\\t%0,%h2,%1"
(use (match_operand:BLK 4 "memory_operand" "m"))
(clobber (reg:CC 33))]
"TARGET_HARD_FLOAT && TARGET_IBM_FLOAT"
- "*
{
- output_asm_insn (\"sd\\t%1,%2\", operands);
- output_asm_insn (\"aw\\t%1,%3\", operands);
- output_asm_insn (\"std\\t%1,%4\", operands);
- output_asm_insn (\"xi\\t%N4,128\", operands);
- return \"l\\t%0,%N4\";
-}"
+ output_asm_insn ("sd\\t%1,%2", operands);
+ output_asm_insn ("aw\\t%1,%3", operands);
+ output_asm_insn ("std\\t%1,%4", operands);
+ output_asm_insn ("xi\\t%N4,128", operands);
+ return "l\\t%0,%N4";
+}
[(set_attr "op_type" "NN")
(set_attr "type" "ftoi")
(set_attr "atype" "agen")
[(set (match_operand:DI 0 "register_operand" "")
(unsigned_fix:DI (match_operand:SF 1 "register_operand" "")))]
"TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
- "
{
rtx label1 = gen_label_rtx ();
rtx label2 = gen_label_rtx ();
operands[1] = force_reg (SFmode, operands[1]);
emit_insn (gen_cmpsf (operands[1],
CONST_DOUBLE_FROM_REAL_VALUE (
- REAL_VALUE_ATOF (\"9223372036854775808.0\", SFmode), SFmode)));
+ REAL_VALUE_ATOF ("9223372036854775808.0", SFmode), SFmode)));
emit_jump_insn (gen_blt (label1));
emit_insn (gen_subsf3 (temp, operands[1],
CONST_DOUBLE_FROM_REAL_VALUE (
- REAL_VALUE_ATOF (\"18446744073709551616.0\", SFmode), SFmode)));
+ REAL_VALUE_ATOF ("18446744073709551616.0", SFmode), SFmode)));
emit_insn (gen_fix_truncsfdi2_ieee (operands[0], temp, GEN_INT(7)));
emit_jump (label2);
emit_insn (gen_fix_truncsfdi2_ieee (operands[0], operands[1], GEN_INT(5)));
emit_label (label2);
DONE;
-}")
+})
(define_expand "fix_truncsfdi2"
[(set (match_operand:DI 0 "register_operand" "")
(fix:DI (match_operand:SF 1 "nonimmediate_operand" "")))]
"TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
- "
{
operands[1] = force_reg (SFmode, operands[1]);
emit_insn (gen_fix_truncsfdi2_ieee (operands[0], operands[1], GEN_INT(5)));
DONE;
-}")
+})
(define_insn "fix_truncsfdi2_ieee"
[(set (match_operand:DI 0 "register_operand" "=d")
(fix:DI (match_operand:SF 1 "register_operand" "f")))
- (unspec:DI [(match_operand:DI 2 "immediate_operand" "K")] 1)
+ (unspec:DI [(match_operand:DI 2 "immediate_operand" "K")] UNSPEC_ROUND)
(clobber (reg:CC 33))]
"TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"cgebr\\t%0,%h2,%1"
[(set (match_operand:SI 0 "register_operand" "")
(unsigned_fix:SI (match_operand:SF 1 "register_operand" "")))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
- "
{
rtx label1 = gen_label_rtx ();
rtx label2 = gen_label_rtx ();
operands[1] = force_reg (SFmode, operands[1]);
emit_insn (gen_cmpsf (operands[1],
CONST_DOUBLE_FROM_REAL_VALUE (
- REAL_VALUE_ATOF (\"2147483648.0\", SFmode), SFmode)));
+ REAL_VALUE_ATOF ("2147483648.0", SFmode), SFmode)));
emit_jump_insn (gen_blt (label1));
emit_insn (gen_subsf3 (temp, operands[1],
CONST_DOUBLE_FROM_REAL_VALUE (
- REAL_VALUE_ATOF (\"4294967296.0\", SFmode), SFmode)));
+ REAL_VALUE_ATOF ("4294967296.0", SFmode), SFmode)));
emit_insn (gen_fix_truncsfsi2_ieee (operands[0], temp, GEN_INT (7)));
emit_jump (label2);
emit_insn (gen_fix_truncsfsi2_ieee (operands[0], operands[1], GEN_INT (5)));
emit_label (label2);
DONE;
-}")
+})
(define_expand "fix_truncsfsi2"
[(set (match_operand:SI 0 "register_operand" "")
(fix:SI (match_operand:SF 1 "nonimmediate_operand" "")))]
"TARGET_HARD_FLOAT"
- "
{
if (TARGET_IBM_FLOAT)
{
}
DONE;
-}")
+})
(define_insn "fix_truncsfsi2_ieee"
[(set (match_operand:SI 0 "register_operand" "=d")
(fix:SI (match_operand:SF 1 "register_operand" "f")))
- (unspec:SI [(match_operand:SI 2 "immediate_operand" "K")] 1)
+ (unspec:SI [(match_operand:SI 2 "immediate_operand" "K")] UNSPEC_ROUND)
(clobber (reg:CC 33))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"cfebr\\t%0,%h2,%1"
(float:DF (match_operand:SI 1 "register_operand" "")))
(clobber (reg:CC 33))])]
"TARGET_HARD_FLOAT"
- "
{
if (TARGET_IBM_FLOAT)
{
emit_insn (gen_floatsidf2_ibm (operands[0], operands[1], two31, temp));
DONE;
}
-}")
+})
(define_insn "floatsidf2_ieee"
[(set (match_operand:DF 0 "register_operand" "=f")
(use (match_operand:BLK 3 "memory_operand" "m"))
(clobber (reg:CC 33))]
"TARGET_HARD_FLOAT && TARGET_IBM_FLOAT"
- "*
{
- output_asm_insn (\"st\\t%1,%N3\", operands);
- output_asm_insn (\"xi\\t%N3,128\", operands);
- output_asm_insn (\"mvc\\t%O3(4,%R3),%2\", operands);
- output_asm_insn (\"ld\\t%0,%3\", operands);
- return \"sd\\t%0,%2\";
-}"
+ output_asm_insn ("st\\t%1,%N3", operands);
+ output_asm_insn ("xi\\t%N3,128", operands);
+ output_asm_insn ("mvc\\t%O3(4,%R3),%2", operands);
+ output_asm_insn ("ld\\t%0,%3", operands);
+ return "sd\\t%0,%2";
+}
[(set_attr "op_type" "NN")
(set_attr "type" "other" )
(set_attr "atype" "agen")
(float:SF (match_operand:SI 1 "register_operand" "")))
(clobber (reg:CC 33))])]
"TARGET_HARD_FLOAT"
- "
{
if (TARGET_IBM_FLOAT)
{
emit_insn (gen_truncdfsf2 (operands[0], temp));
DONE;
}
-}")
+})
(define_insn "floatsisf2_ieee"
[(set (match_operand:SF 0 "register_operand" "=f")
[(set (match_operand:DF 0 "register_operand" "")
(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "")))]
"TARGET_HARD_FLOAT"
- "
{
if (TARGET_IBM_FLOAT)
{
emit_insn (gen_extendsfdf2_ibm (operands[0], operands[1]));
DONE;
}
-}")
+})
(define_insn "extendsfdf2_ieee"
[(set (match_operand:DF 0 "register_operand" "=f,f")
(match_operand:DI 1 "s390_plus_operand" "")
(match_operand:DI 2 "register_operand" "=&a")])]
"TARGET_64BIT"
- "
{
s390_expand_plus_operand (operands[0], operands[1], operands[2]);
DONE;
-}")
+})
;
(match_operand:SI 1 "s390_plus_operand" "")
(match_operand:SI 2 "register_operand" "=&a")])]
"!TARGET_64BIT"
- "
{
s390_expand_plus_operand (operands[0], operands[1], operands[2]);
DONE;
-}")
+})
;
(mult:DI (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" ""))
(sign_extend:DI (match_operand:SI 2 "nonimmediate_operand" ""))))]
"!TARGET_64BIT"
- "
{
rtx insn;
gen_rtx_SIGN_EXTEND (DImode, operands[2])),
REG_NOTES (insn));
DONE;
-}")
+})
(define_insn "mulsi_6432"
[(set (match_operand:DI 0 "register_operand" "=d,d")
(mod:DI (match_dup 1) (match_dup 2)))])
(clobber (match_dup 4))]
"TARGET_64BIT"
- "
{
rtx insn, div_equal, mod_equal, equal;
gen_rtx_EXPR_LIST (REG_EQUAL, mod_equal, REG_NOTES (insn));
DONE;
-}")
+})
(define_insn "divmodtidi3"
[(set (match_operand:TI 0 "register_operand" "=d,d")
(umod:DI (match_dup 1) (match_dup 2)))])
(clobber (match_dup 4))]
"TARGET_64BIT"
- "
{
rtx insn, div_equal, mod_equal, equal;
gen_rtx_EXPR_LIST (REG_EQUAL, mod_equal, REG_NOTES (insn));
DONE;
-}")
+})
(define_insn "udivmodtidi3"
[(set (match_operand:TI 0 "register_operand" "=d,d")
(mod:SI (match_dup 1) (match_dup 2)))])
(clobber (match_dup 4))]
"!TARGET_64BIT"
- "
{
rtx insn, div_equal, mod_equal, equal;
gen_rtx_EXPR_LIST (REG_EQUAL, mod_equal, REG_NOTES (insn));
DONE;
-}")
+})
(define_insn "divmoddisi3"
[(set (match_operand:DI 0 "register_operand" "=d,d")
(match_operand:SI 2 "general_operand" "")))
(clobber (match_dup 3))]
"!TARGET_64BIT"
- "
{
rtx insn, udiv_equal, umod_equal, equal;
}
emit_move_insn (operands[0], operands[0]);
DONE;
-}")
+})
(define_expand "umodsi3"
[(set (match_operand:SI 0 "register_operand" "=d")
(match_operand:SI 2 "nonimmediate_operand" "")))
(clobber (match_dup 3))]
"!TARGET_64BIT"
- "
{
rtx insn, udiv_equal, umod_equal, equal;
emit_label (label3);
}
DONE;
-}")
+})
;
; divdf3 instruction pattern(s).
(match_operand:DI 2 "immediate_operand" "n")))
(clobber (reg:CC 33))]
"TARGET_64BIT && s390_single_hi (operands[2], DImode, -1) >= 0"
- "*
{
int part = s390_single_hi (operands[2], DImode, -1);
operands[2] = GEN_INT (s390_extract_hi (operands[2], DImode, part));
switch (part)
{
- case 0: return \"nihh\\t%0,%x2\";
- case 1: return \"nihl\\t%0,%x2\";
- case 2: return \"nilh\\t%0,%x2\";
- case 3: return \"nill\\t%0,%x2\";
+ case 0: return "nihh\\t%0,%x2";
+ case 1: return "nihl\\t%0,%x2";
+ case 2: return "nilh\\t%0,%x2";
+ case 3: return "nill\\t%0,%x2";
default: abort ();
}
-}"
+}
[(set_attr "op_type" "RI")])
(define_insn "anddi3"
(match_operand:SI 2 "immediate_operand" "n")))
(clobber (reg:CC 33))]
"TARGET_64BIT && s390_single_hi (operands[2], SImode, -1) >= 0"
- "*
{
int part = s390_single_hi (operands[2], SImode, -1);
operands[2] = GEN_INT (s390_extract_hi (operands[2], SImode, part));
switch (part)
{
- case 0: return \"nilh\\t%0,%x2\";
- case 1: return \"nill\\t%0,%x2\";
+ case 0: return "nilh\\t%0,%x2";
+ case 1: return "nill\\t%0,%x2";
default: abort ();
}
-}"
+}
[(set_attr "op_type" "RI")])
(define_insn "andsi3"
(match_operand:DI 2 "immediate_operand" "n")))
(clobber (reg:CC 33))]
"TARGET_64BIT && s390_single_hi (operands[2], DImode, 0) >= 0"
- "*
{
int part = s390_single_hi (operands[2], DImode, 0);
operands[2] = GEN_INT (s390_extract_hi (operands[2], DImode, part));
switch (part)
{
- case 0: return \"oihh\\t%0,%x2\";
- case 1: return \"oihl\\t%0,%x2\";
- case 2: return \"oilh\\t%0,%x2\";
- case 3: return \"oill\\t%0,%x2\";
+ case 0: return "oihh\\t%0,%x2";
+ case 1: return "oihl\\t%0,%x2";
+ case 2: return "oilh\\t%0,%x2";
+ case 3: return "oill\\t%0,%x2";
default: abort ();
}
-}"
+}
[(set_attr "op_type" "RI")])
(define_insn "iordi3"
(match_operand:SI 2 "immediate_operand" "n")))
(clobber (reg:CC 33))]
"TARGET_64BIT && s390_single_hi (operands[2], SImode, 0) >= 0"
- "*
{
int part = s390_single_hi (operands[2], SImode, 0);
operands[2] = GEN_INT (s390_extract_hi (operands[2], SImode, part));
switch (part)
{
- case 0: return \"oilh\\t%0,%x2\";
- case 1: return \"oill\\t%0,%x2\";
+ case 0: return "oilh\\t%0,%x2";
+ case 1: return "oill\\t%0,%x2";
default: abort ();
}
-}"
+}
[(set_attr "op_type" "RI")])
(define_insn "iorsi3"
(neg:DI (match_operand:DI 1 "register_operand" "d")))
(clobber (reg:CC 33))]
"!TARGET_64BIT"
- "*
{
rtx xop[1];
xop[0] = gen_label_rtx ();
- output_asm_insn (\"lcr\\t%0,%1\", operands);
- output_asm_insn (\"lcr\\t%N0,%N1\", operands);
- output_asm_insn (\"je\\t%l0\", xop);
- output_asm_insn (\"bctr\\t%0,0\", operands);
- (*targetm.asm_out.internal_label) (asm_out_file, \"L\",
+ output_asm_insn ("lcr\\t%0,%1", operands);
+ output_asm_insn ("lcr\\t%N0,%N1", operands);
+ output_asm_insn ("je\\t%l0", xop);
+ output_asm_insn ("bctr\\t%0,0", operands);
+ (*targetm.asm_out.internal_label) (asm_out_file, "L",
CODE_LABEL_NUMBER (xop[0]));
- return \"\";
-}"
+ return "";
+}
[(set_attr "op_type" "NN")
(set_attr "type" "other")
(set_attr "length" "10")])
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }")
+ "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;")
(define_expand "bne"
[(set (reg:CCZ 33) (compare:CCZ (match_dup 1) (match_dup 2)))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }")
+ "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;")
(define_expand "bgt"
[(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2)))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }")
+ "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;")
(define_expand "bgtu"
[(set (reg:CCU 33) (compare:CCU (match_dup 1) (match_dup 2)))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }")
+ "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;")
(define_expand "blt"
[(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2)))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }")
+ "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;")
(define_expand "bltu"
[(set (reg:CCU 33) (compare:CCU (match_dup 1) (match_dup 2)))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }")
+ "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;")
(define_expand "bge"
[(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2)))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }")
+ "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;")
(define_expand "bgeu"
[(set (reg:CCU 33) (compare:CCU (match_dup 1) (match_dup 2)))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }")
+ "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;")
(define_expand "ble"
[(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2)))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }")
+ "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;")
(define_expand "bleu"
[(set (reg:CCU 33) (compare:CCU (match_dup 1) (match_dup 2)))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }")
+ "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;")
(define_expand "bunordered"
[(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2)))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }")
+ "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;")
(define_expand "bordered"
[(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2)))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }")
+ "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;")
(define_expand "buneq"
[(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2)))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }")
+ "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;")
(define_expand "bungt"
[(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2)))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }")
+ "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;")
(define_expand "bunlt"
[(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2)))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }")
+ "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;")
(define_expand "bunge"
[(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2)))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }")
+ "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;")
(define_expand "bunle"
[(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2)))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }")
+ "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;")
(define_expand "bltgt"
[(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2)))
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }")
+ "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;")
;;
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "*
{
if (get_attr_length (insn) == 4)
- return \"j%C1\\t%l0\";
+ return "j%C1\\t%l0";
else if (TARGET_64BIT)
- return \"jg%C1\\t%l0\";
+ return "jg%C1\\t%l0";
else
abort ();
-}"
+}
[(set_attr "op_type" "RI")
(set_attr "type" "branch")
(set (attr "length")
(match_operand 0 "address_operand" "U")
(pc)))]
""
- "*
{
if (get_attr_op_type (insn) == OP_TYPE_RR)
- return \"b%C1r\\t%0\";
+ return "b%C1r\\t%0";
else
- return \"b%C1\\t%a0\";
-}"
+ return "b%C1\\t%a0";
+}
[(set (attr "op_type")
(if_then_else (match_operand 0 "register_operand" "")
(const_string "RR") (const_string "RX")))
(pc)
(label_ref (match_operand 0 "" ""))))]
""
- "*
{
if (get_attr_length (insn) == 4)
- return \"j%D1\\t%l0\";
+ return "j%D1\\t%l0";
else if (TARGET_64BIT)
- return \"jg%D1\\t%l0\";
+ return "jg%D1\\t%l0";
else
abort ();
-}"
+}
[(set_attr "op_type" "RI")
(set_attr "type" "branch")
(set (attr "length")
(pc)
(match_operand 0 "address_operand" "U")))]
""
- "*
{
if (get_attr_op_type (insn) == OP_TYPE_RR)
- return \"b%D1r\\t%0\";
+ return "b%D1r\\t%0";
else
- return \"b%D1\\t%a0\";
-}"
+ return "b%D1\\t%a0";
+}
[(set (attr "op_type")
(if_then_else (match_operand 0 "register_operand" "")
(const_string "RR") (const_string "RX")))
[(match_dup 2) (const_int 0)])
(match_operand:SI 1 "general_operand" ""))]
""
- "
{
enum machine_mode ccmode;
s390_compare_op0, s390_compare_op1);
operands[2] = gen_rtx_REG (ccmode, 33);
operands[3] = gen_rtx_COMPARE (ccmode, s390_compare_op0, s390_compare_op1);
-}")
+})
(define_insn "*trap"
[(trap_if (match_operator 0 "comparison_operator" [(reg 33) (const_int 0)])
(use (match_operand 3 "" "")) ; loop level
(use (match_operand 4 "" ""))] ; label
""
- "
{
if (GET_MODE (operands[0]) == SImode)
emit_jump_insn (gen_doloop_si (operands[4], operands[0], operands[0]));
FAIL;
DONE;
-}")
+})
(define_insn "doloop_si"
[(set (pc)
(clobber (match_scratch:SI 3 "=X,&d"))
(clobber (reg:CC 33))]
""
- "*
{
if (which_alternative != 0)
- return \"#\";
+ return "#";
else if (get_attr_length (insn) == 4)
- return \"brct\\t%1,%l0\";
+ return "brct\\t%1,%l0";
else
abort ();
-}"
+}
[(set_attr "op_type" "RI")
(set_attr "type" "branch")
(set (attr "length")
(clobber (match_scratch:SI 3 "=X,&d"))
(clobber (reg:CC 33))]
""
- "*
{
if (get_attr_op_type (insn) == OP_TYPE_RR)
- return \"bctr\\t%1,%0\";
+ return "bctr\\t%1,%0";
else
- return \"bct\\t%1,%a0\";
-}"
+ return "bct\\t%1,%a0";
+}
[(set (attr "op_type")
(if_then_else (match_operand 0 "register_operand" "")
(const_string "RR") (const_string "RX")))
(clobber (match_scratch:DI 3 "=X,&d"))
(clobber (reg:CC 33))]
"TARGET_64BIT"
- "*
{
if (which_alternative != 0)
- return \"#\";
+ return "#";
else if (get_attr_length (insn) == 4)
- return \"brctg\\t%1,%l0\";
+ return "brctg\\t%1,%l0";
else
abort ();
-}"
+}
[(set_attr "op_type" "RI")
(set_attr "type" "branch")
(set (attr "length")
(clobber (match_scratch:DI 3 "=X,&d"))
(clobber (reg:CC 33))]
""
- "*
{
if (get_attr_op_type (insn) == OP_TYPE_RRE)
- return \"bctgr\\t%1,%0\";
+ return "bctgr\\t%1,%0";
else
- return \"bctg\\t%1,%a0\";
-}"
+ return "bctg\\t%1,%a0";
+}
[(set (attr "op_type")
(if_then_else (match_operand 0 "register_operand" "")
(const_string "RRE") (const_string "RXE")))
(define_insn "jump"
[(set (pc) (label_ref (match_operand 0 "" "")))]
""
- "*
{
if (get_attr_length (insn) == 4)
- return \"j\\t%l0\";
+ return "j\\t%l0";
else if (TARGET_64BIT)
- return \"jg\\t%l0\";
+ return "jg\\t%l0";
else
abort ();
-}"
+}
[(set_attr "op_type" "RI")
(set_attr "type" "branch")
(set (attr "length")
(define_insn "indirect_jump"
[(set (pc) (match_operand 0 "address_operand" "U"))]
""
- "*
{
if (get_attr_op_type (insn) == OP_TYPE_RR)
- return \"br\\t%0\";
+ return "br\\t%0";
else
- return \"b\\t%a0\";
-}"
+ return "b\\t%a0";
+}
[(set (attr "op_type")
(if_then_else (match_operand 0 "register_operand" "")
(const_string "RR") (const_string "RX")))
[(set (pc) (match_operand 0 "address_operand" "U"))
(use (label_ref (match_operand 1 "" "")))]
""
- "*
{
if (get_attr_op_type (insn) == OP_TYPE_RR)
- return \"br\\t%0\";
+ return "br\\t%0";
else
- return \"b\\t%a0\";
-}"
+ return "b\\t%a0";
+}
[(set (attr "op_type")
(if_then_else (match_operand 0 "register_operand" "")
(const_string "RR") (const_string "RX")))
(label_ref (match_operand 3 "" ""))
(label_ref (match_operand 4 "" ""))]
""
- "
{
rtx index = gen_reg_rtx (SImode);
rtx base = gen_reg_rtx (Pmode);
emit_jump_insn (gen_casesi_jump (target, operands[3]));
DONE;
-}")
+})
;;
(match_operand 1 "" "")
(match_operand 2 "" "")])]
""
- "
{
int i;
emit_insn (gen_blockage ());
DONE;
-}")
+})
;; UNSPEC_VOLATILE is considered to use and clobber all hard registers and
;; all of memory. This blocks insns from being moved across this point.
(define_insn "blockage"
- [(unspec_volatile [(const_int 0)] 0)]
+ [(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)]
""
""
[(set_attr "type" "none")
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))]
""
- "
{
rtx insn;
insn = emit_call_insn (gen_call_exp (operands[0], operands[1],
gen_rtx_REG (Pmode, RETURN_REGNUM)));
DONE;
-}")
+})
(define_expand "call_exp"
[(parallel [(call (match_operand 0 "" "")
(match_operand 2 "" "")))
(use (match_operand 3 "" ""))]
""
- "
{
rtx insn;
gen_call_value_exp (operands[0], operands[1], operands[2],
gen_rtx_REG (Pmode, RETURN_REGNUM)));
DONE;
-}")
+})
(define_expand "call_value_exp"
[(parallel [(set (match_operand 0 "" "")
(call (const_int 0) (const_int 0)))
(use (match_operand 1 "" ""))]
""
- "
{
rtx insn, sym;
CONST_OR_PURE_CALL_P (insn) = 1;
DONE;
-}")
+})
(define_expand "call_value_tls_exp"
[(parallel [(set (match_operand 0 "" "")
(set (match_operand 0 "general_operand" "")
(reg 15))]
""
- "
{
rtx stack = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM);
rtx chain = gen_rtx (MEM, Pmode, stack);
emit_move_insn (operands[0], virtual_stack_dynamic_rtx);
DONE;
-}")
+})
;
(set (match_dup 0) (match_operand 1 "register_operand" ""))
(set (match_dup 3) (match_dup 2))]
""
- "
{
operands[2] = gen_reg_rtx (Pmode);
operands[3] = gen_rtx_MEM (Pmode, operands[0]);
-}")
+})
(define_expand "save_stack_nonlocal"
[(match_operand 0 "memory_operand" "")
(match_operand 1 "register_operand" "")]
""
- "
{
rtx temp = gen_reg_rtx (Pmode);
TARGET_64BIT ? TImode : DImode),
operands[1]);
DONE;
-}")
+})
(define_expand "restore_stack_nonlocal"
[(match_operand 0 "register_operand" "")
(match_operand 1 "memory_operand" "")]
""
- "
{
rtx temp = gen_reg_rtx (Pmode);
TARGET_64BIT ? TImode : DImode));
emit_move_insn (gen_rtx_MEM (Pmode, operands[0]), temp);
DONE;
-}")
+})
;
(define_expand "prologue"
[(use (const_int 0))]
""
- "
-{
- s390_emit_prologue ();
- DONE;
-}")
+ "s390_emit_prologue (); DONE;")
(define_expand "epilogue"
[(use (const_int 1))]
""
- "
-{
- s390_emit_epilogue ();
- DONE;
-}")
+ "s390_emit_epilogue (); DONE;")
(define_insn "*return_si"
[(set (match_operand:DI 0 "register_operand" "=r")
(match_operand:SI 1 "register_operand" "r"))]
""
- "
{
- /*
- emit_insn (gen_zero_extendsidi2 (operands[0], operands[1]));
- emit_insn (gen_anddi3 (operands[0], operands[0], GEN_INT (0x7fffffff)));
- */
-
emit_insn (gen_anddi3 (operands[0],
gen_lowpart (DImode, operands[1]),
GEN_INT (0x7fffffff)));
-
DONE;
-}")
+})
projects / gcc.git / commitdiff