radv/gfx10: add missing dcc_tile_swizzle tweak

Fixes: c90f46700dd ("radv/gfx10: mask DCC tile swizzle by alignment")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index ce12bb61fb9cb03e9bc7e2cdd7a4ca0f9305da81..aaaf15ec8dc6fc02e45ac7065ee9ce87fcc2153f 100644 (file)
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -484,7 +484,9 @@ si_set_mutable_tex_desc_fields(struct radv_device *device,
                        if (chip_class <= GFX8)
                                meta_va += base_level_info->dcc_offset;
 
-                       meta_va |= (uint32_t)plane->surface.tile_swizzle << 8;
+                       unsigned dcc_tile_swizzle = plane->surface.tile_swizzle << 8;
+                       dcc_tile_swizzle &= plane->surface.dcc_alignment - 1;
+                       meta_va |= dcc_tile_swizzle;
                } else if (!is_storage_image &&
                           radv_image_is_tc_compat_htile(image)) {
                        meta_va = gpu_address + image->htile_offset;