i386.md (*movsf_internal, [...]): Return 256-bit AVX modes for TARGET_PREFER_AVX256.

gcc/
        * config/i386/i386.md (*movsf_internal, *movdf_internal):
        Return 256-bit AVX modes for TARGET_PREFER_AVX256.

gcc/testsuite/
        * gcc.target/i386/avx512f-constant-float-return.c: New test.

From-SVN: r253259

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a6c8b93c43915d95e7daa6e20b1cc0f5a40e8ca2..c8b67cdf2f9e07701b2aff5f9703327c45713a39 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2017-09-28  Sergey Shalnov  <Sergey.Shalnov@intel.com>
+
+       * config/i386/i386.md (*movsf_internal, *movdf_internal):
+       Return 256-bit AVX modes for TARGET_PREFER_AVX256.
+
 2017-09-28  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
        * config/arm/arm.c (arm_option_override): Forbid ARMv8-M Security
@@ -785,7 +790,7 @@
 
 2017-09-21  Martin Sebor  <msebor@redhat.com>
 
-       * PR c/81882
+       PR c/81882
        * doc/extend.texi (attribute ifunc): Avoid relying on ill-formed
        code (in C++) or code that triggers warnings.
 

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index f51e02c7732674df8edb29e0de7cdb1ccd0edd98..b9a392852d4e25d5718a6520bbf7e6a78d609eab 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -3524,7 +3524,8 @@
               (eq_attr "alternative" "12,16")
                 (cond [(not (match_test "TARGET_SSE2"))
                          (const_string "V4SF")
-                       (match_test "TARGET_AVX512F")
+                       (and (match_test "TARGET_AVX512F")
+                         (not (match_test "TARGET_PREFER_AVX256")))
                          (const_string "XI")
                        (match_test "TARGET_AVX")
                          (const_string "V2DF")
@@ -3693,7 +3694,8 @@
               (eq_attr "alternative" "5")
                 (cond [(not (match_test "TARGET_SSE2"))
                          (const_string "V4SF")
-                       (match_test "TARGET_AVX512F")
+                       (and (match_test "TARGET_AVX512F")
+                         (not (match_test "TARGET_PREFER_AVX256")))
                          (const_string "V16SF")
                        (match_test "TARGET_AVX")
                          (const_string "V4SF")

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index d016f99f904ca9ad8c1dbd71553fe26fa7aa0e42..c86a664de4d47b0f0d3881b108fe7527d89b7a4e 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2017-09-28  Sergey Shalnov  <Sergey.Shalnov@intel.com>
+
+       * gcc.target/i386/avx512f-constant-float-return.c: New test.
+
 2017-09-28  Christophe Lyon  <christophe.lyon@linaro.org>
 
        * gcc.target/arm/aapcs/align4.c: Require arm_neon_hw effective target.

diff --git a/gcc/testsuite/gcc.target/i386/avx512f-constant-float-return.c b/gcc/testsuite/gcc.target/i386/avx512f-constant-float-return.c
new file mode 100644 (file)
index 0000000..153cf69
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-constant-float-return.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=skylake-avx512 -mprefer-avx256" } */
+/* { dg-final { scan-assembler-not "%zmm\[0-9\]+" } } */
+
+float
+my_test_f()
+{
+  return 0.0f;
+}
+
+double
+my_test_d()
+{
+  return 0.0;
+}