Fix first divergence in #1178

diff --git a/passes/opt/wreduce.cc b/passes/opt/wreduce.cc
index 1fbc4108264618c0f5aa288e1cec6ee970afbad8..65068238b086512160298fd033ef6d6ca6be7cd9 100644 (file)
--- a/passes/opt/wreduce.cc
+++ b/passes/opt/wreduce.cc
@@ -430,6 +430,7 @@ struct WreduceWorker
                for (auto w : module->wires())
                        complete_wires.insert(mi.sigmap(w));
 
+               std::vector<std::pair<Wire*,Wire*>> swap_wire_names;
                for (auto w : module->selected_wires())
                {
                        int unused_top_bits = 0;
@@ -454,9 +455,12 @@ struct WreduceWorker
                        log("Removed top %d bits (of %d) from wire %s.%s.\n", unused_top_bits, GetSize(w), log_id(module), log_id(w));
                        Wire *nw = module->addWire(NEW_ID, GetSize(w) - unused_top_bits);
                        module->connect(nw, SigSpec(w).extract(0, GetSize(nw)));
-                       module->swap_names(w, nw);
+                       swap_wire_names.emplace_back(w, nw);
                }
 
+               for (const auto &i : swap_wire_names)
+                       module->swap_names(i.first, i.second);
+
                if (!remove_init_bits.empty()) {
                        for (auto w : module->wires()) {
                                if (w->attributes.count("\\init")) {