+2015-07-10 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/sse.md (movdi_to_sse): Use gen_lowpart
+ and gen_higpart instead of gen_rtx_SUBREG.
+ * config/i386/i386.md
+ (floatdi<X87MODEF:mode>2_i387_with_xmm splitter): Ditto.
+ (read-modify peephole2): Use gen_lowpart instead of
+ gen_rtx_SUBREG for operand 5.
+
2015-07-10 Andrew MacLeod <amacleod@redhat.com>
* config/tilepro/gen-mul-tables.cc (main): Change include list for
2015-07-10 Jiong Wang <jiong.wang@arm.com>
- * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Mark mem
- as READONLY and NOTRAP for PIC symbol.
+ * config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
+ Mark mem as READONLY and NOTRAP for PIC symbol.
2015-07-10 Andrew MacLeod <amacleod@redhat.com>
- * gimple-predict.h: New file.
+ * gimple-predict.h: New file.
(gimple_predict_predictor, gimple_predict_set_predictor,
gimple_predict_outcome, gimple_predict_set_outcome,
gimple_build_predict): Relocate here.
* gimple.h (gimple_predict_predictor, gimple_predict_set_predictor,
- gimple_predict_outcome, gimple_predict_set_outcome): Move to
+ gimple_predict_outcome, gimple_predict_set_outcome): Move to
gimple-predict.h.
* gimple.c (gimple_build_predict): Move to gimple-predict.h
* basic-block.h: Don't include cfghooks.h.
2015-07-10 Richard Biener <rguenther@suse.de>
- * genmatch.c (dt_node::gen_kids_1): Fix indenting of
- case labels.
+ * genmatch.c (dt_node::gen_kids_1): Fix indenting of case labels.
(decision_tree::gen_gimple): Likewise.
(decision_tree::gen_generic): Likewise.
* config/i386/predicates.md (nonimmediate_gr_operand): New predicate.
* config/i386/i386.md (not peephole2): Use nonimmediate_gr_operand.
(varous peephole2s): Use {GENERAL,SSE,MMX}_REGNO_P instead of
- {GENERAL_SSE_MMX}_REG_P where appropriate.
+ {GENERAL,SSE,MMX}_REG_P where appropriate.
2015-07-09 Andrew MacLeod <amacleod@redhat.com>
/* The DImode arrived in a pair of integral registers (e.g. %edx:%eax).
Assemble the 64-bit DImode value in an xmm register. */
emit_insn (gen_sse2_loadld (operands[3], CONST0_RTX (V4SImode),
- gen_rtx_SUBREG (SImode, operands[1], 0)));
+ gen_lowpart (SImode, operands[1])));
emit_insn (gen_sse2_loadld (operands[4], CONST0_RTX (V4SImode),
- gen_rtx_SUBREG (SImode, operands[1], 4)));
+ gen_highpart (SImode, operands[1])));
emit_insn (gen_vec_interleave_lowv4si (operands[3], operands[3],
- operands[4]));
+ operands[4]));
operands[3] = gen_rtx_REG (DImode, REGNO (operands[3]));
})
operands[1] = gen_rtx_PLUS (word_mode, base,
gen_rtx_MULT (word_mode, index, GEN_INT (scale)));
- operands[5] = base;
if (mode != word_mode)
operands[1] = gen_rtx_SUBREG (mode, operands[1], 0);
+
+ operands[5] = base;
if (op1mode != word_mode)
- operands[5] = gen_rtx_SUBREG (op1mode, operands[5], 0);
+ operands[5] = gen_lowpart (op1mode, operands[5]);
+
operands[0] = dest;
})
\f
/* The DImode arrived in a pair of integral registers (e.g. %edx:%eax).
Assemble the 64-bit DImode value in an xmm register. */
emit_insn (gen_sse2_loadld (operands[0], CONST0_RTX (V4SImode),
- gen_rtx_SUBREG (SImode, operands[1], 0)));
+ gen_lowpart (SImode, operands[1])));
emit_insn (gen_sse2_loadld (operands[2], CONST0_RTX (V4SImode),
- gen_rtx_SUBREG (SImode, operands[1], 4)));
+ gen_highpart (SImode, operands[1])));
emit_insn (gen_vec_interleave_lowv4si (operands[0], operands[0],
operands[2]));
}