src/arch/sparc/asi.cc:
src/arch/sparc/asi.hh:
add CMT ASI registers
src/arch/sparc/tlb.cc:
Panic if any of the CMT registers are being accessed
--HG--
extra : convert_revision :
b9a94281e2074a576ac21d042b756950d509e758
bool AsiIsCmt(ASI asi)
{
return
- (asi == ASI_CMT_PER_STRAND);
+ (asi == ASI_CMT_PER_STRAND) ||
+ (asi == ASI_CMT_SHARED);
}
bool AsiIsQueue(ASI asi)
bool AsiIsReg(ASI asi)
{
return AsiIsMmu(asi) || AsiIsScratchPad(asi) ||
- AsiIsSparcError(asi) || AsiIsInterrupt(asi);
+ AsiIsSparcError(asi) || AsiIsInterrupt(asi)
+ || AsiIsCmt(asi);
}
bool AsiIsSparcError(ASI asi)
ASI_IMMU_CTXT_NONZERO_TSB_BASE_PS1 = 0x3E,
ASI_IMMU_CTXT_NONZERO_CONFIG = 0x3F,
ASI_STREAM_MA = 0x40,
+ ASI_CMT_SHARED = 0x41,
//0x41 implementation dependent
ASI_SPARC_BIST_CONTROL = 0x42,
ASI_INST_MASK_REG = 0x42,
if (AsiIsPartialStore(asi))
panic("Partial Store ASIs not supported\n");
+ if (AsiIsCmt(asi))
+ panic("Cmt ASI registers not implmented\n");
+
if (AsiIsInterrupt(asi))
goto handleIntRegAccess;
if (AsiIsMmu(asi))