O3: Keep around the last committed instruction and use for squashing.

Without this change 0 is always used for the youngest sequence number if
a squash occured and the ROB was empty (E.g. an instruction is marked
serializeAfter or a fetch stall prevents other instructions from issuing).
Using 0 there is a race to rename where an instruction that committed the
same cycle as the squashing instruction can have it's renamed state undone
by the squash using sequence number 0.

diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh
index 7183889c6e52b6fbb3a292f0ca8fb0e7d241a741..659b0ad5fd53a87e6b0246ebc6a90c35c7ee0614 100644 (file)
--- a/src/cpu/o3/commit.hh
+++ b/src/cpu/o3/commit.hh
@@ -1,4 +1,16 @@
 /*
+ * Copyright (c) 2010 ARM Limited
+ * All rights reserved.
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
  * Copyright (c) 2004-2006 The Regents of The University of Michigan
  * All rights reserved.
  *
@@ -409,6 +421,9 @@ class DefaultCommit
     /** The sequence number of the youngest valid instruction in the ROB. */
     InstSeqNum youngestSeqNum[Impl::MaxThreads];
 
+    /** The sequence number of the last commited instruction. */
+    InstSeqNum lastCommitedSeqNum[Impl::MaxThreads];
+
     /** Records if there is a trap currently in flight. */
     bool trapInFlight[Impl::MaxThreads];
 

diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 78e9a88481537a4063fdace6ccd15e9edd7806db..a49e1497ef03c9956d4afc042c9bea4326a91526 100644 (file)
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -141,6 +141,7 @@ DefaultCommit<Impl>::DefaultCommit(O3CPU *_cpu, DerivO3CPUParams *params)
         trapSquash[tid] = false;
         tcSquash[tid] = false;
         pc[tid].set(0);
+        lastCommitedSeqNum[tid] = 0;
     }
 #if FULL_SYSTEM
     interrupt = NoFault;
@@ -498,12 +499,12 @@ DefaultCommit<Impl>::squashAll(ThreadID tid)
     // Hopefully this doesn't mess things up.  Basically I want to squash
     // all instructions of this thread.
     InstSeqNum squashed_inst = rob->isEmpty() ?
-        0 : rob->readHeadInst(tid)->seqNum - 1;
+        lastCommitedSeqNum[tid] : rob->readHeadInst(tid)->seqNum - 1;
 
     // All younger instructions will be squashed. Set the sequence
     // number as the youngest instruction in the ROB (0 in this case.
     // Hopefully nothing breaks.)
-    youngestSeqNum[tid] = 0;
+    youngestSeqNum[tid] = lastCommitedSeqNum[tid];
 
     rob->squash(squashed_inst, tid);
     changedROBNumEntries[tid] = true;
@@ -960,6 +961,9 @@ DefaultCommit<Impl>::commitInsts()
 
                 TheISA::advancePC(pc[tid], head_inst->staticInst);
 
+                // Keep track of the last sequence number commited
+                lastCommitedSeqNum[tid] = head_inst->seqNum;
+
                 // If this is an instruction that doesn't play nicely with
                 // others squash everything and restart fetch
                 if (head_inst->isSquashAfter())