static void
prepare_urb( struct brw_context *brw )
{
- brw->urb.nr_vs_entries = 256;
- brw->urb.nr_gs_entries = 256;
+ int urb_size, max_urb_entry;
+ struct intel_context *intel = &brw->intel;
+
+ if (IS_GT1(intel->intelScreen->deviceID)) {
+ urb_size = 32 * 1024;
+ max_urb_entry = 128;
+ } else {
+ urb_size = 64 * 1024;
+ max_urb_entry = 256;
+ }
+
+ brw->urb.nr_vs_entries = max_urb_entry;
+ brw->urb.nr_gs_entries = max_urb_entry;
/* CACHE_NEW_VS_PROG */
brw->urb.vs_size = MAX2(brw->vs.prog_data->urb_entry_size, 1);
- if (256 * brw->urb.vs_size > 64 * 1024)
+ if (2 * brw->urb.vs_size > urb_size)
brw->urb.nr_vs_entries = brw->urb.nr_gs_entries =
- (64 * 1024 ) / brw->urb.vs_size;
+ (urb_size ) / (2 * brw->urb.vs_size);
}
static void
devid == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS || \
devid == PCI_CHIP_SANDYBRIDGE_S)
+#define IS_GT1(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT1 || \
+ devid == PCI_CHIP_SANDYBRIDGE_M_GT1 || \
+ devid == PCI_CHIP_SANDYBRIDGE_S)
+
#define IS_965(devid) (IS_GEN4(devid) || \
IS_G4X(devid) || \
IS_GEN5(devid) || \