(no commit message)

diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn
index 2347ed6cf991e867b00b6e70dc2eae053321bd3f..f1ba46b602d8f5654944310db4b4223431ed9dcf 100644 (file)
--- a/openpower/sv/branches.mdwn
+++ b/openpower/sv/branches.mdwn
@@ -64,7 +64,8 @@ even if the branch points to the next instruction (no actual branch).
 
 # Overview
 
-When considering an "array" of branch-tests, there are four useful modes:
+When considering an "array" of branch-tests, there are four
+primarily-useful modes:
 AND, OR, NAND and NOR of all Conditions.
 NAND and NOR may be synthesised from AND and OR by
 inverting `BO[1]` which just leaves two modes:
@@ -429,8 +430,16 @@ should **not** be considered part of the Vector. Consequently:
 
 # Boolean Logic combinations
 
-There are an extraordinary number of different combinations which
-provide completely different and useful behaviour.
+In a Scalar ISA, Branch-Conditional testing even of vector
+results may be performed through inversion of tests. NOR of
+all tests may be performed by inversion of the scalar condition
+and branching *out* from the scalar loop around elements,
+using scalar operations.
+
+In a parallel (Vector) ISA it is the ISA itself which must perform
+the prerequisite logic manipulation.
+Thus for SVP64 there are an extraordinary number of nesessary combinations 
+which provide completely different and useful behaviour.
 Available options to combine:
 
 * `BO[0]` to make an unconditional branch would seem irrelevant if