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diff --git a/index.mdwn b/index.mdwn
index c4a544f4ec6abd231c7db43955e80897032273e0..131955ecf69e9d52e3a1d27beaec716231afb58d 100644 (file)
--- a/index.mdwn
+++ b/index.mdwn
@@ -80,8 +80,24 @@ list](http://bugs.libre-riscv.org) and see if there are any bugs that
 pique your interest.
 3. After that, go ahead and take a look at the
    [git repositories](https://git.libre-riscv.org).
-Try and clone a repository with
-``git clone https://git.libre-riscv.org/git/repositoryname.git``
+
+    pip3 install virtualenv requests
+    mkdir ~/.virtualenvs && cd ~/.virtualenvs
+    python3 -m venv libresoc
+    source ~/.virtualenvs/bin/activate
+    
+    cd ~; mkdir libresoc; cd libresoc
+    git clone https://git.libre-riscv.org/git/nmutil.git
+    git clone https://git.libre-riscv.org/git/ieee754fpu.git
+    git clone https://git.libre-riscv.org/git/soc.git
+    
+    cd nmutil; pip3 install -e .; cd ..
+    cd ieee754fpu; pip3 install -e .; cd ..
+    cd soc; pip3 install -e .; cd ..
+    
+    python3 soc/src/soc/decoder/power_decoder.py
+
+
 4. If you plan to do HDL work, you should familiarize yourself with our
    [[HDL_workflow]].
 5. We do have funding available (see [[nlnet]]) upon completion of issues -