i965: Move has_hiz from the slice to the level.

The value depends only on the level, so no need to store the bool per slice.
Shrinks intel_mipmap_slice from 24 bytes to 16, while slotting into an
existing hole in intel_mipmap_level.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index b800403f5273da075711dcc1843598a96b586a54..aab5fd61e2e79bf274a9e756dc7370f2926b5bc3 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -325,7 +325,7 @@ brw_hiz_op_params::brw_hiz_op_params(struct intel_mipmap_tree *mt,
    x1 = depth.width;
    y1 = depth.height;
 
-   assert(intel_miptree_slice_has_hiz(mt, level, layer));
+   assert(intel_miptree_level_has_hiz(mt, level));
 
    switch (mt->format) {
    case MESA_FORMAT_Z_UNORM16:       depth_format = BRW_DEPTHFORMAT_D16_UNORM; break;

diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index dcf40d036e736c4c3582a81c3b0716186e44eff5..76e22bd5ac94474f35065580cfa7237d7523668d 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -180,7 +180,7 @@ brw_get_depthstencil_tile_masks(struct intel_mipmap_tree *depth_mt,
    if (depth_mt) {
       intel_miptree_get_tile_masks(depth_mt, &tile_mask_x, &tile_mask_y, false);
 
-      if (intel_miptree_slice_has_hiz(depth_mt, depth_level, depth_layer)) {
+      if (intel_miptree_level_has_hiz(depth_mt, depth_level)) {
          uint32_t hiz_tile_mask_x, hiz_tile_mask_y;
          intel_miptree_get_tile_masks(depth_mt->hiz_mt,
                                       &hiz_tile_mask_x, &hiz_tile_mask_y,

diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c
index 2d68de80b8f4dbc8e855162855ce71831bed1791..61c24efd6348eff8eda65cfeb806d68b6643f230 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_fbo.c
+++ b/src/mesa/drivers/dri/i965/intel_fbo.c
@@ -900,7 +900,7 @@ intel_blit_framebuffer(struct gl_context *ctx,
 bool
 intel_renderbuffer_has_hiz(struct intel_renderbuffer *irb)
 {
-   return intel_miptree_slice_has_hiz(irb->mt, irb->mt_level, irb->mt_layer);
+   return intel_miptree_level_has_hiz(irb->mt, irb->mt_level);
 }
 
 bool

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index b23fddf7b0fc36caa0b58d664216f9ae06bbe80a..2ce33992a5f9e7ea286bff312dbcf1da08e0fbb5 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -1347,14 +1347,13 @@ intel_miptree_alloc_non_msrt_mcs(struct brw_context *brw,
 
 /**
  * Helper for intel_miptree_alloc_hiz() that sets
- * \c mt->level[level].slice[layer].has_hiz. Return true if and only if
+ * \c mt->level[level].has_hiz. Return true if and only if
  * \c has_hiz was set.
  */
 static bool
-intel_miptree_slice_enable_hiz(struct brw_context *brw,
+intel_miptree_level_enable_hiz(struct brw_context *brw,
                                struct intel_mipmap_tree *mt,
-                               uint32_t level,
-                               uint32_t layer)
+                               uint32_t level)
 {
    assert(mt->hiz_mt);
 
@@ -1373,7 +1372,7 @@ intel_miptree_slice_enable_hiz(struct brw_context *brw,
       }
    }
 
-   mt->level[level].slice[layer].has_hiz = true;
+   mt->level[level].has_hiz = true;
    return true;
 }
 
@@ -1402,10 +1401,10 @@ intel_miptree_alloc_hiz(struct brw_context *brw,
    /* Mark that all slices need a HiZ resolve. */
    struct intel_resolve_map *head = &mt->hiz_map;
    for (int level = mt->first_level; level <= mt->last_level; ++level) {
-      for (int layer = 0; layer < mt->level[level].depth; ++layer) {
-         if (!intel_miptree_slice_enable_hiz(brw, mt, level, layer))
-            continue;
+      if (!intel_miptree_level_enable_hiz(brw, mt, level))
+         continue;
 
+      for (int layer = 0; layer < mt->level[level].depth; ++layer) {
         head->next = malloc(sizeof(*head->next));
         head->next->prev = head;
         head->next->next = NULL;
@@ -1424,12 +1423,10 @@ intel_miptree_alloc_hiz(struct brw_context *brw,
  * Does the miptree slice have hiz enabled?
  */
 bool
-intel_miptree_slice_has_hiz(struct intel_mipmap_tree *mt,
-                            uint32_t level,
-                            uint32_t layer)
+intel_miptree_level_has_hiz(struct intel_mipmap_tree *mt, uint32_t level)
 {
-   intel_miptree_check_level_layer(mt, level, layer);
-   return mt->level[level].slice[layer].has_hiz;
+   intel_miptree_check_level_layer(mt, level, 0);
+   return mt->level[level].has_hiz;
 }
 
 void
@@ -1437,7 +1434,7 @@ intel_miptree_slice_set_needs_hiz_resolve(struct intel_mipmap_tree *mt,
                                          uint32_t level,
                                          uint32_t layer)
 {
-   if (!intel_miptree_slice_has_hiz(mt, level, layer))
+   if (!intel_miptree_level_has_hiz(mt, level))
       return;
 
    intel_resolve_map_set(&mt->hiz_map,
@@ -1450,7 +1447,7 @@ intel_miptree_slice_set_needs_depth_resolve(struct intel_mipmap_tree *mt,
                                             uint32_t level,
                                             uint32_t layer)
 {
-   if (!intel_miptree_slice_has_hiz(mt, level, layer))
+   if (!intel_miptree_level_has_hiz(mt, level))
       return;
 
    intel_resolve_map_set(&mt->hiz_map,

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 6e6ae4bd6f54bd289c46bbe77e4e4ef58a70c457..6a918848de2517da826f7405b5fe332b494fe0f3 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -114,6 +114,15 @@ struct intel_mipmap_level
     */
    GLuint depth;
 
+   /**
+    * \brief Is HiZ enabled for this level?
+    *
+    * If \c mt->level[l].has_hiz is set, then (1) \c mt->hiz_mt has been
+    * allocated and (2) the HiZ memory for the slices in this level reside at
+    * \c mt->hiz_mt->level[l].
+    */
+   bool has_hiz;
+
    /**
     * \brief List of 2D images in this mipmap level.
     *
@@ -143,15 +152,6 @@ struct intel_mipmap_level
        * intel_miptree_map/unmap on this slice.
        */
       struct intel_miptree_map *map;
-
-      /**
-       * \brief Is HiZ enabled for this slice?
-       *
-       * If \c mt->level[l].slice[s].has_hiz is set, then (1) \c mt->hiz_mt
-       * has been allocated and (2) the HiZ memory corresponding to this slice
-       * resides at \c mt->hiz_mt->level[l].slice[s].
-       */
-      bool has_hiz;
    } *slice;
 };
 
@@ -586,9 +586,7 @@ intel_miptree_alloc_hiz(struct brw_context *brw,
                        struct intel_mipmap_tree *mt);
 
 bool
-intel_miptree_slice_has_hiz(struct intel_mipmap_tree *mt,
-                            uint32_t level,
-                            uint32_t layer);
+intel_miptree_level_has_hiz(struct intel_mipmap_tree *mt, uint32_t level);
 
 void
 intel_miptree_slice_set_needs_hiz_resolve(struct intel_mipmap_tree *mt,