+2017-06-09 Segher Boessenkool <segher@kernel.crashing.org>
+
+ PR target/80966
+ * config/rs6000/rs6000.c (rs6000_emit_allocate_stack): Assert that
+ gen_add3_insn did not fail.
+ * config/rs6000/rs6000.md (add<mode>3): If asked to add a constant to
+ r0, construct that number in a temporary reg and add that reg to r0.
+ If asked to put the result in r0 as well, fail.
+
2017-06-08 Will Schmidt <will_schmidt@vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling
&& REGNO (stack_limit_rtx) > 1
&& REGNO (stack_limit_rtx) <= 31)
{
- emit_insn (gen_add3_insn (tmp_reg, stack_limit_rtx, GEN_INT (size)));
- emit_insn (gen_cond_trap (LTU, stack_reg, tmp_reg,
- const0_rtx));
+ rtx_insn *insn
+ = gen_add3_insn (tmp_reg, stack_limit_rtx, GEN_INT (size));
+ gcc_assert (insn);
+ emit_insn (insn);
+ emit_insn (gen_cond_trap (LTU, stack_reg, tmp_reg, const0_rtx));
}
else if (GET_CODE (stack_limit_rtx) == SYMBOL_REF
&& TARGET_32BIT
|| rtx_equal_p (operands[0], operands[1]))
? operands[0] : gen_reg_rtx (<MODE>mode));
+ /* Adding a constant to r0 is not a valid insn, so use a different
+ strategy in that case. */
+ if (REGNO (operands[1]) == 0 || REGNO (tmp) == 0)
+ {
+ if (operands[0] == operands[1])
+ FAIL;
+ rs6000_emit_move (operands[0], operands[2], <MODE>mode);
+ emit_insn (gen_add<mode>3 (operands[0], operands[1], operands[0]));
+ DONE;
+ }
+
HOST_WIDE_INT val = INTVAL (operands[2]);
HOST_WIDE_INT low = ((val & 0xffff) ^ 0x8000) - 0x8000;
HOST_WIDE_INT rest = trunc_int_for_mode (val - low, <MODE>mode);
+2017-06-09 Segher Boessenkool <segher@kernel.crashing.org>
+
+ PR target/80966
+ * gcc.target/powerpc/stack-limit.c: New testcase.
+
2017-06-08 Will Schmidt <will_schmidt@vnet.ibm.com>
* testsuite/gcc.target/powerpc/fold-vec-logical-eqv-char.c: New.
--- /dev/null
+/* { dg-options "-O0 -fstack-limit-register=r14" } */
+
+// PR80966
+
+int foo (int i)
+{
+ char arr[135000];
+
+ arr[i] = 0;
+}