arch, base, cpu, gpu, mem: Replace assert(0 or false with panic.

Neither assert(0) nor assert(false) give any hint as to why control
getting to them is bad, and their more descriptive versions,
assert(0 && "description") and assert(false && "description"), jury
rig assert to add an error message when the utility function panic()
already does that directly with better formatting options.

This change replaces that flavor of call to assert with panic, except
in the actual code which processes the formatting that panic uses (to
avoid infinitely recurring error handling), and in some *.sm files
since I don't know what rules those have to follow and don't want to
accidentaly break them.

Change-Id: I8addfbfaf77eaed94ec8191f2ae4efb477cefdd0
Reviewed-on: https://gem5-review.googlesource.com/c/14636
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

diff --git a/src/arch/arm/insts/fplib.cc b/src/arch/arm/insts/fplib.cc
index 8ef127781a7e9abf4e54e6b0984ff88cf6a4bce6..49305ecf27d01b0e1c65f52929d71d16704aea4d 100644 (file)
--- a/src/arch/arm/insts/fplib.cc
+++ b/src/arch/arm/insts/fplib.cc
@@ -42,6 +42,7 @@
 
 #include <cassert>
 
+#include "base/logging.hh"
 #include "fplib.hh"
 
 namespace ArmISA
@@ -3740,7 +3741,7 @@ fplibRecipEstimate(uint16_t op, FPSCR &fpscr)
             overflow_to_inf = false;
             break;
           default:
-            assert(0);
+            panic("Unrecognized FP rounding mode");
         }
         result = overflow_to_inf ? fp16_infinity(sgn) : fp16_max_normal(sgn);
         flags |= FPLIB_OFC | FPLIB_IXC;
@@ -3802,7 +3803,7 @@ fplibRecipEstimate(uint32_t op, FPSCR &fpscr)
             overflow_to_inf = false;
             break;
           default:
-            assert(0);
+            panic("Unrecognized FP rounding mode");
         }
         result = overflow_to_inf ? fp32_infinity(sgn) : fp32_max_normal(sgn);
         flags |= FPLIB_OFC | FPLIB_IXC;
@@ -3864,7 +3865,7 @@ fplibRecipEstimate(uint64_t op, FPSCR &fpscr)
             overflow_to_inf = false;
             break;
           default:
-            assert(0);
+            panic("Unrecognized FP rounding mode");
         }
         result = overflow_to_inf ? fp64_infinity(sgn) : fp64_max_normal(sgn);
         flags |= FPLIB_OFC | FPLIB_IXC;
@@ -4108,7 +4109,7 @@ fplibRoundInt(uint16_t op, FPRounding rounding, bool exact, FPSCR &fpscr)
             x += err >> 1;
             break;
           default:
-            assert(0);
+            panic("Unrecognized FP rounding mode");
         }
 
         if (x == 0) {
@@ -4173,7 +4174,7 @@ fplibRoundInt(uint32_t op, FPRounding rounding, bool exact, FPSCR &fpscr)
             x += err >> 1;
             break;
           default:
-            assert(0);
+            panic("Unrecognized FP rounding mode");
         }
 
         if (x == 0) {
@@ -4238,7 +4239,7 @@ fplibRoundInt(uint64_t op, FPRounding rounding, bool exact, FPSCR &fpscr)
             x += err >> 1;
             break;
           default:
-            assert(0);
+            panic("Unrecognized FP rounding mode");
         }
 
         if (x == 0) {
@@ -4575,7 +4576,7 @@ FPToFixed_64(int sgn, int exp, uint64_t mnt, bool u, FPRounding rounding,
         x += err >> 1;
         break;
       default:
-        assert(0);
+        panic("Unrecognized FP rounding mode");
     }
 
     if (u ? sgn && x : x > (1ULL << (FP64_BITS - 1)) - !sgn) {

diff --git a/src/arch/arm/insts/pred_inst.hh b/src/arch/arm/insts/pred_inst.hh
index 62d1c09ab025caf173824340d0ceddc1300684e3..38ff8adea72bbdd5ff9a4230398a37064668093a 100644 (file)
--- a/src/arch/arm/insts/pred_inst.hh
+++ b/src/arch/arm/insts/pred_inst.hh
@@ -43,6 +43,7 @@
 #define __ARCH_ARM_INSTS_PREDINST_HH__
 
 #include "arch/arm/insts/static_inst.hh"
+#include "base/logging.hh"
 #include "base/trace.hh"
 
 namespace ArmISA
@@ -186,7 +187,7 @@ vfp_modified_imm(uint8_t data, FpDataType dtype)
                   (bits(bigData, 7) << 63);
         break;
       default:
-        assert(0);
+        panic("Unrecognized FP data type");
     }
     return bigData;
 }

diff --git a/src/arch/mips/isa/formats/mem.isa b/src/arch/mips/isa/formats/mem.isa
index a2710fb902e83541284c1e42b9b6b76359bd0968..e2204db6ffef440acbb906b902709b2b4fab6a51 100644 (file)
--- a/src/arch/mips/isa/formats/mem.isa
+++ b/src/arch/mips/isa/formats/mem.isa
@@ -121,9 +121,7 @@ output exec {{
             return packet->getLE<uint64_t>();
 
           default:
-            std::cerr << "bad store data size = " << packet->getSize() << std::endl;
-
-            assert(0);
+            panic("bad store data size = %d", packet->getSize());
             return 0;
         }
     }

diff --git a/src/base/inet.cc b/src/base/inet.cc
index 57af0e56c8b34ec9eea6bee054215751daba309d..44a37d28048735341b5e5f54285ed455c4cb1bcb 100644 (file)
--- a/src/base/inet.cc
+++ b/src/base/inet.cc
@@ -51,6 +51,7 @@
 #include <string>
 
 #include "base/cprintf.hh"
+#include "base/logging.hh"
 #include "base/types.hh"
 
 using namespace std;
@@ -238,7 +239,7 @@ cksum(const TcpPtr &tcp)
     } else if (Ip6Ptr(tcp.packet())) {
         return __tu_cksum6(Ip6Ptr(tcp.packet()));
     } else {
-        assert(0);
+        panic("Unrecognized IP packet format");
     }
     // Should never reach here
     return 0;
@@ -252,7 +253,7 @@ cksum(const UdpPtr &udp)
     } else if (Ip6Ptr(udp.packet())) {
         return __tu_cksum6(Ip6Ptr(udp.packet()));
     } else {
-        assert(0);
+        panic("Unrecognized IP packet format");
     }
     return 0;
 }

diff --git a/src/cpu/minor/buffers.hh b/src/cpu/minor/buffers.hh
index 864b29e0cef161bb13cbfe56c8c959320c1b91d7..edf87dec535236dc69915eb5b3690483209f89b0 100644 (file)
--- a/src/cpu/minor/buffers.hh
+++ b/src/cpu/minor/buffers.hh
@@ -118,7 +118,11 @@ class NoBubbleTraits
 {
   public:
     static bool isBubble(const ElemType &) { return false; }
-    static ElemType bubble() { assert(false); }
+    static ElemType
+    bubble()
+    {
+        panic("bubble called but no bubble interface");
+    }
 };
 
 /** Pass on call to the element */

diff --git a/src/cpu/minor/lsq.cc b/src/cpu/minor/lsq.cc
index ad103b00165a9f54a7b957d1d4135c1d3098a377..b836ed22d916b2ffa7b26b2f6d8c42249f9ae317 100644 (file)
--- a/src/cpu/minor/lsq.cc
+++ b/src/cpu/minor/lsq.cc
@@ -44,6 +44,7 @@
 
 #include "arch/locked_mem.hh"
 #include "arch/mmapped_ipr.hh"
+#include "base/logging.hh"
 #include "cpu/minor/cpu.hh"
 #include "cpu/minor/exec_context.hh"
 #include "cpu/minor/execute.hh"
@@ -1121,8 +1122,7 @@ LSQ::tryToSend(LSQRequestPtr request)
                 request->setState(LSQRequest::StoreBufferIssuing);
                 break;
               default:
-                assert(false);
-                break;
+                panic("Unrecognized LSQ request state %d.", request->state);
             }
 
             state = MemoryRunning;
@@ -1144,8 +1144,7 @@ LSQ::tryToSend(LSQRequestPtr request)
                 request->setState(LSQRequest::StoreBufferNeedsRetry);
                 break;
               default:
-                assert(false);
-                break;
+                panic("Unrecognized LSQ request state %d.", request->state);
             }
         }
     }
@@ -1226,10 +1225,7 @@ LSQ::recvTimingResp(PacketPtr response)
         }
         break;
       default:
-        /* Shouldn't be allowed to receive a response from another
-         *  state */
-        assert(false);
-        break;
+        panic("Shouldn't be allowed to receive a response from another state");
     }
 
     /* We go to idle even if there are more things in the requests queue
@@ -1260,7 +1256,7 @@ LSQ::recvReqRetry()
         retryRequest->setState(LSQRequest::StoreInStoreBuffer);
         break;
       default:
-        assert(false);
+        panic("Unrecognized retry request state %d.", retryRequest->state);
     }
 
     /* Set state back to MemoryRunning so that the following
@@ -1283,8 +1279,7 @@ LSQ::recvReqRetry()
             storeBuffer.countIssuedStore(retryRequest);
             break;
           default:
-            assert(false);
-            break;
+            panic("Unrecognized retry request state %d.", retryRequest->state);
         }
 
         retryRequest = NULL;

diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 8fd142c089b2a4d0c5f6b057b580ba12171e32f0..4775e98d15412ec51948287a1fbd12c4b4d33e71 100644 (file)
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -49,8 +49,9 @@
 #include <string>
 
 #include "arch/utility.hh"
-#include "base/loader/symtab.hh"
 #include "base/cp_annotate.hh"
+#include "base/loader/symtab.hh"
+#include "base/logging.hh"
 #include "config/the_isa.hh"
 #include "cpu/checker/cpu.hh"
 #include "cpu/o3/commit.hh"
@@ -127,8 +128,8 @@ DefaultCommit<Impl>::DefaultCommit(O3CPU *_cpu, DerivO3CPUParams *params)
 
         DPRINTF(Commit,"Commit Policy set to Oldest Ready.");
     } else {
-        assert(0 && "Invalid SMT Commit Policy. Options Are: {Aggressive,"
-               "RoundRobin,OldestReady}");
+        panic("Invalid SMT commit policy. Options are: Aggressive, "
+               "RoundRobin, OldestReady");
     }
 
     for (ThreadID tid = 0; tid < numThreads; tid++) {

diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh
index bc4822ba7ac7cd5ee03becedd457dcb14f402de9..410c15ffa67bac39779836d40acb935c55d00ed2 100644 (file)
--- a/src/cpu/o3/inst_queue_impl.hh
+++ b/src/cpu/o3/inst_queue_impl.hh
@@ -48,6 +48,7 @@
 #include <limits>
 #include <vector>
 
+#include "base/logging.hh"
 #include "cpu/o3/fu_pool.hh"
 #include "cpu/o3/inst_queue.hh"
 #include "debug/IQ.hh"
@@ -162,8 +163,8 @@ InstructionQueue<Impl>::InstructionQueue(O3CPU *cpu_ptr, IEW *iew_ptr,
         DPRINTF(IQ, "IQ sharing policy set to Threshold:"
                 "%i entries per thread.\n",thresholdIQ);
    } else {
-       assert(0 && "Invalid IQ Sharing Policy.Options Are:{Dynamic,"
-              "Partitioned, Threshold}");
+       panic("Invalid IQ sharing policy. Options are: Dynamic, "
+              "Partitioned, Threshold");
    }
 }
 

diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh
index 967a496f68f48c56a2b792cdc96e0f720c637a66..83de8ddff2b879285fc4143efa1da0e0a8aa83f1 100644 (file)
--- a/src/cpu/o3/lsq_impl.hh
+++ b/src/cpu/o3/lsq_impl.hh
@@ -48,6 +48,7 @@
 #include <list>
 #include <string>
 
+#include "base/logging.hh"
 #include "cpu/o3/lsq.hh"
 #include "debug/Drain.hh"
 #include "debug/Fetch.hh"
@@ -109,8 +110,8 @@ LSQ<Impl>::LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params)
                 "%i entries per LQ | %i entries per SQ\n",
                 maxLQEntries,maxSQEntries);
     } else {
-        assert(0 && "Invalid LSQ Sharing Policy.Options Are:{Dynamic,"
-                    "Partitioned, Threshold}");
+        panic("Invalid LSQ sharing policy. Options are: Dynamic, "
+                    "Partitioned, Threshold");
     }
 
     //Initialize LSQs

diff --git a/src/cpu/o3/rob_impl.hh b/src/cpu/o3/rob_impl.hh
index 223f94caa298d31a9c26ea43b771806f45650163..991dc967dca368eb81629d9a15f730613ab18e83 100644 (file)
--- a/src/cpu/o3/rob_impl.hh
+++ b/src/cpu/o3/rob_impl.hh
@@ -46,6 +46,7 @@
 
 #include <list>
 
+#include "base/logging.hh"
 #include "cpu/o3/rob.hh"
 #include "debug/Fetch.hh"
 #include "debug/ROB.hh"
@@ -99,8 +100,8 @@ ROB<Impl>::ROB(O3CPU *_cpu, DerivO3CPUParams *params)
             maxEntries[tid] = threshold;
         }
     } else {
-        assert(0 && "Invalid ROB Sharing Policy.Options Are:{Dynamic,"
-                    "Partitioned, Threshold}");
+        panic("Invalid ROB sharing policy. Options are: Dynamic, "
+                "Partitioned, Threshold");
     }
 
     resetState();

diff --git a/src/gpu-compute/gpu_dyn_inst.hh b/src/gpu-compute/gpu_dyn_inst.hh
index 0d357de386ef750515f7400aa0c383d169973d73..9e63c445944d5016843d7e1c86af487cb2c375d2 100644 (file)
--- a/src/gpu-compute/gpu_dyn_inst.hh
+++ b/src/gpu-compute/gpu_dyn_inst.hh
@@ -39,6 +39,7 @@
 #include <cstdint>
 #include <string>
 
+#include "base/logging.hh"
 #include "enums/MemType.hh"
 #include "enums/StorageClassType.hh"
 #include "gpu-compute/compute_unit.hh"
@@ -407,8 +408,7 @@ class GPUDynInst : public GPUExecContext
         } else if (isGroupSeg()) {
             req->setMemSpaceConfigFlags(Request::GROUP_SEGMENT);
         } else if (isFlat()) {
-            // TODO: translate to correct scope
-            assert(false);
+            panic("TODO: translate to correct scope");
         } else {
             fatal("%s has bad segment type\n", disassemble());
         }

diff --git a/src/gpu-compute/gpu_tlb.cc b/src/gpu-compute/gpu_tlb.cc
index fea6183eda168754b200932f1f75d00a1a421ebb..dbf7d262855f51e5bd46b1f50109918903278a80 100644 (file)
--- a/src/gpu-compute/gpu_tlb.cc
+++ b/src/gpu-compute/gpu_tlb.cc
@@ -45,6 +45,7 @@
 #include "arch/x86/regs/misc.hh"
 #include "arch/x86/x86_traits.hh"
 #include "base/bitfield.hh"
+#include "base/logging.hh"
 #include "base/output.hh"
 #include "base/trace.hh"
 #include "cpu/base.hh"
@@ -1150,16 +1151,16 @@ namespace X86ISA
 
         if ((inUser && !tlb_entry->user) ||
             (mode == BaseTLB::Write && badWrite)) {
-           // The page must have been present to get into the TLB in
-           // the first place. We'll assume the reserved bits are
-           // fine even though we're not checking them.
-           assert(false);
+            // The page must have been present to get into the TLB in
+            // the first place. We'll assume the reserved bits are
+            // fine even though we're not checking them.
+            panic("Page fault detected");
         }
 
         if (storeCheck && badWrite) {
-           // This would fault if this were a write, so return a page
-           // fault that reflects that happening.
-           assert(false);
+            // This would fault if this were a write, so return a page
+            // fault that reflects that happening.
+            panic("Page fault detected");
         }
     }
 
@@ -1362,7 +1363,7 @@ namespace X86ISA
              */
             handleTranslationReturn(virtPageAddr, TLB_MISS, pkt);
         } else {
-            assert(false);
+            panic("Unexpected TLB outcome %d", outcome);
         }
     }
 
@@ -1607,7 +1608,7 @@ namespace X86ISA
     {
         // The CPUSidePort never sends anything but replies. No retries
         // expected.
-        assert(false);
+        panic("recvReqRetry called");
     }
 
     AddrRangeList
@@ -1648,7 +1649,7 @@ namespace X86ISA
     {
         // No retries should reach the TLB. The retries
         // should only reach the TLBCoalescer.
-        assert(false);
+        panic("recvReqRetry called");
     }
 
     void

diff --git a/src/gpu-compute/gpu_tlb.hh b/src/gpu-compute/gpu_tlb.hh
index 04d9bfce83c00ad4a6ad1e804c18667f92f79e85..9ca478d916d3084610ea80a70b2043fd39815b06 100644 (file)
--- a/src/gpu-compute/gpu_tlb.hh
+++ b/src/gpu-compute/gpu_tlb.hh
@@ -272,7 +272,7 @@ namespace X86ISA
             virtual void recvFunctional(PacketPtr pkt);
             virtual void recvRangeChange() { }
             virtual void recvReqRetry();
-            virtual void recvRespRetry() { assert(false); }
+            virtual void recvRespRetry() { panic("recvRespRetry called"); }
             virtual AddrRangeList getAddrRanges() const;
         };
 

diff --git a/src/gpu-compute/tlb_coalescer.cc b/src/gpu-compute/tlb_coalescer.cc
index 68d2689efcb090ec89a8f76914152f074bd78dcb..193c44ed8704d8be824af67e8c0aed99685fca2f 100644 (file)
--- a/src/gpu-compute/tlb_coalescer.cc
+++ b/src/gpu-compute/tlb_coalescer.cc
@@ -37,6 +37,7 @@
 
 #include <cstring>
 
+#include "base/logging.hh"
 #include "debug/GPUTLB.hh"
 #include "sim/process.hh"
 
@@ -335,7 +336,7 @@ TLBCoalescer::CpuSidePort::recvTimingReq(PacketPtr pkt)
 void
 TLBCoalescer::CpuSidePort::recvReqRetry()
 {
-    assert(false);
+    panic("recvReqRetry called");
 }
 
 void

diff --git a/src/mem/cache/queue.hh b/src/mem/cache/queue.hh
index 1d7ce0c07f3b7ec7a83f780c38b13e5edb5bc80e..36ddb96c2f6a697e502c119aa31899fe9d340bd8 100644 (file)
--- a/src/mem/cache/queue.hh
+++ b/src/mem/cache/queue.hh
@@ -52,6 +52,7 @@
 #include <cassert>
 #include <string>
 
+#include "base/logging.hh"
 #include "base/trace.hh"
 #include "base/types.hh"
 #include "debug/Drain.hh"
@@ -108,8 +109,7 @@ class Queue : public Drainable
                 return readyList.insert(i, entry);
             }
         }
-        assert(false);
-        return readyList.end();  // keep stupid compilers happy
+        panic("Failed to add to ready list.");
     }
 
     /** The number of entries that are in service. */

diff --git a/src/mem/mem_checker_monitor.cc b/src/mem/mem_checker_monitor.cc
index ee7eb3fcc8c7b88ead0155432f3089e3ee1cb465..75c797c32555dc212d6fdb23207e77a195bb3a7b 100644 (file)
--- a/src/mem/mem_checker_monitor.cc
+++ b/src/mem/mem_checker_monitor.cc
@@ -43,6 +43,7 @@
 
 #include <memory>
 
+#include "base/logging.hh"
 #include "base/output.hh"
 #include "base/trace.hh"
 #include "debug/MemCheckerMonitor.hh"
@@ -129,15 +130,13 @@ MemCheckerMonitor::recvFunctionalSnoop(PacketPtr pkt)
 Tick
 MemCheckerMonitor::recvAtomic(PacketPtr pkt)
 {
-    assert(false && "Atomic not supported");
-    return masterPort.sendAtomic(pkt);
+    panic("Atomic not supported");
 }
 
 Tick
 MemCheckerMonitor::recvAtomicSnoop(PacketPtr pkt)
 {
-    assert(false && "Atomic not supported");
-    return slavePort.sendAtomicSnoop(pkt);
+    panic("Atomic not supported");
 }
 
 bool

diff --git a/src/mem/ruby/filters/H3BloomFilter.cc b/src/mem/ruby/filters/H3BloomFilter.cc
index 10dc4d283ca738708679f255dfe9b7002bedc00a..71d4c88ce7a09519acbfbbfec64a711a7a7f9a43 100644 (file)
--- a/src/mem/ruby/filters/H3BloomFilter.cc
+++ b/src/mem/ruby/filters/H3BloomFilter.cc
@@ -29,6 +29,7 @@
 #include "mem/ruby/filters/H3BloomFilter.hh"
 
 #include "base/intmath.hh"
+#include "base/logging.hh"
 
 using namespace std;
 
@@ -437,8 +438,7 @@ H3BloomFilter::set(Addr addr)
 void
 H3BloomFilter::unset(Addr addr)
 {
-    cout << "ERROR: Unset should never be called in a Bloom filter";
-    assert(0);
+    panic("ERROR: Unset should never be called in a Bloom filter");
 }
 
 bool

diff --git a/src/mem/ruby/filters/MultiBitSelBloomFilter.cc b/src/mem/ruby/filters/MultiBitSelBloomFilter.cc
index 5faaa10da57a16c824b29e6cd647ef16d8a82975..e2ca4d08c94c16209cf465cd6854a97a96dd8e36 100644 (file)
--- a/src/mem/ruby/filters/MultiBitSelBloomFilter.cc
+++ b/src/mem/ruby/filters/MultiBitSelBloomFilter.cc
@@ -31,6 +31,7 @@
 #include <vector>
 
 #include "base/intmath.hh"
+#include "base/logging.hh"
 #include "base/str.hh"
 
 using namespace std;
@@ -111,8 +112,7 @@ MultiBitSelBloomFilter::set(Addr addr)
 void
 MultiBitSelBloomFilter::unset(Addr addr)
 {
-    cout << "ERROR: Unset should never be called in a Bloom filter";
-    assert(0);
+    panic("ERROR: Unset should never be called in a Bloom filter");
 }
 
 bool

diff --git a/src/mem/ruby/network/garnet2.0/RoutingUnit.cc b/src/mem/ruby/network/garnet2.0/RoutingUnit.cc
index 695f50ee581a20437b25127ad493f765e677d7a3..b39bb3c576f1ff87d20261b250edfb8ab2561583 100644 (file)
--- a/src/mem/ruby/network/garnet2.0/RoutingUnit.cc
+++ b/src/mem/ruby/network/garnet2.0/RoutingUnit.cc
@@ -34,6 +34,7 @@
 #include "mem/ruby/network/garnet2.0/RoutingUnit.hh"
 
 #include "base/cast.hh"
+#include "base/logging.hh"
 #include "mem/ruby/network/garnet2.0/InputUnit.hh"
 #include "mem/ruby/network/garnet2.0/Router.hh"
 #include "mem/ruby/slicc_interface/Message.hh"
@@ -224,7 +225,7 @@ RoutingUnit::outportComputeXY(RouteInfo route,
         // x_hops == 0 and y_hops == 0
         // this is not possible
         // already checked that in outportCompute() function
-        assert(0);
+        panic("x_hops == y_hops == 0");
     }
 
     return m_outports_dirn2idx[outport_dirn];
@@ -237,6 +238,5 @@ RoutingUnit::outportComputeCustom(RouteInfo route,
                                  int inport,
                                  PortDirection inport_dirn)
 {
-    assert(0);
-    return -1;
+    panic("%s placeholder executed", __FUNCTION__);
 }

diff --git a/src/mem/ruby/structures/CacheMemory.cc b/src/mem/ruby/structures/CacheMemory.cc
index 8d99c90aa297b277303b5b882bdbe678b786a649..6c93c3260d6a4ac21fb30d55612a8a3a4d027583 100644 (file)
--- a/src/mem/ruby/structures/CacheMemory.cc
+++ b/src/mem/ruby/structures/CacheMemory.cc
@@ -30,6 +30,7 @@
 #include "mem/ruby/structures/CacheMemory.hh"
 
 #include "base/intmath.hh"
+#include "base/logging.hh"
 #include "debug/RubyCache.hh"
 #include "debug/RubyCacheTrace.hh"
 #include "debug/RubyResourceStalls.hh"
@@ -637,8 +638,7 @@ CacheMemory::checkResourceAvailable(CacheResourceType res, Addr addr)
             return false;
         }
     } else {
-        assert(false);
-        return true;
+        panic("Unrecognized cache resource type.");
     }
 }