radeonsi: set correct stencil tile mode for texturing
authorMarek Olšák <marek.olsak@amd.com>
Thu, 19 May 2016 18:12:10 +0000 (20:12 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Wed, 1 Jun 2016 15:35:30 +0000 (17:35 +0200)
Sadly, this doesn't affect SI and VI in any way.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
src/gallium/drivers/radeonsi/si_descriptors.c

index 6dcce3cdb08aa15fd5b2f92f626a119942a905d1..71f4d713fcede1dc1a37c954987fb4b07ee7a614 100644 (file)
@@ -342,12 +342,18 @@ static void si_set_sampler_view(struct si_context *sctx,
                pipe_sampler_view_reference(&views->views[slot], view);
                memcpy(desc, rview->state, 8*4);
 
-               if (view->texture && view->texture->target != PIPE_BUFFER)
+               if (view->texture && view->texture->target != PIPE_BUFFER) {
+                       bool is_separate_stencil =
+                               rtex->is_depth && !rtex->is_flushing_texture &&
+                               rview->is_stencil_sampler;
+
                        si_set_mutable_tex_desc_fields(rtex,
                                                       rview->base_level_info,
                                                       rview->base_level,
                                                       rview->block_width,
-                                                      false, desc);
+                                                      is_separate_stencil,
+                                                      desc);
+               }
 
                if (view->texture && view->texture->target != PIPE_BUFFER &&
                    rtex->fmask.size) {