radeonsi: Use llvm.amdgcn.mbcnt.* intrinsics instead of llvm.SI.tid
authorTom Stellard <thomas.stellard@amd.com>
Fri, 15 Apr 2016 22:53:38 +0000 (22:53 +0000)
committerTom Stellard <thomas.stellard@amd.com>
Fri, 22 Apr 2016 23:48:43 +0000 (23:48 +0000)
We're trying to move to more of the new style intrinsics with include
the correct target name, and map directly to ISA instructions.

v2:
  - Only do this with LLVM 3.8 and newer.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
src/gallium/drivers/radeonsi/si_shader.c

index cd6725ecdfcb6c8d8829e84841d8d3a31058dd2e..9b3f59147182b8d15e39f76f07e504161e088e86 100644 (file)
@@ -1141,8 +1141,23 @@ static void set_range_metadata(LLVMValueRef value, unsigned lo, unsigned hi)
 static LLVMValueRef get_thread_id(struct si_shader_context *ctx)
 {
        struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm;
-       LLVMValueRef tid = lp_build_intrinsic(gallivm->builder, "llvm.SI.tid",
+       LLVMValueRef tid;
+
+       if (HAVE_LLVM < 0x0308) {
+               tid = lp_build_intrinsic(gallivm->builder, "llvm.SI.tid",
                                ctx->i32,   NULL, 0, LLVMReadNoneAttribute);
+       } else {
+               LLVMValueRef tid_args[2];
+               tid_args[0] = lp_build_const_int32(gallivm, 0xffffffff);
+               tid_args[1] = lp_build_const_int32(gallivm, 0);
+               tid_args[1] = lp_build_intrinsic(gallivm->builder,
+                                       "llvm.amdgcn.mbcnt.lo", ctx->i32,
+                                       tid_args, 2, LLVMReadNoneAttribute);
+
+               tid = lp_build_intrinsic(gallivm->builder,
+                                       "llvm.amdgcn.mbcnt.hi", ctx->i32,
+                                       tid_args, 2, LLVMReadNoneAttribute);
+       }
        set_range_metadata(tid, 0, 64);
        return tid;
 }