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radeon/llvm: reserve also corresponding 128bits reg
author
Vincent Lejeune
<vljn@ovi.com>
Tue, 11 Sep 2012 15:56:39 +0000
(17:56 +0200)
committer
Vincent Lejeune
<vljn@ovi.com>
Tue, 18 Sep 2012 15:59:51 +0000
(17:59 +0200)
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
src/gallium/drivers/radeon/R600RegisterInfo.cpp
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diff --git
a/src/gallium/drivers/radeon/R600RegisterInfo.cpp
b/src/gallium/drivers/radeon/R600RegisterInfo.cpp
index ef6bf878f6f21042e10c0de02a7ee3d5a6b3e0bb..4096cb050bfb4fd9b8724b2670c7fd692db7941b 100644
(file)
--- a/
src/gallium/drivers/radeon/R600RegisterInfo.cpp
+++ b/
src/gallium/drivers/radeon/R600RegisterInfo.cpp
@@
-50,6
+50,7
@@
BitVector R600RegisterInfo::getReservedRegs(const MachineFunction &MF) const
for (std::vector<unsigned>::const_iterator I = MFI->ReservedRegs.begin(),
E = MFI->ReservedRegs.end(); I != E; ++I) {
Reserved.set(*I);
+ Reserved.set(*(getSuperRegisters(*I)));
}
return Reserved;