AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d,
System *s, BaseCPU *c, Platform *p,
MemoryController *mmu, Addr a,
- HierParams *hier, Bus *bus)
+ HierParams *hier, Bus *pio_bus)
: PioDevice(name, p), disk(d), console(cons), system(s), cpu(c), addr(a)
{
mmu->add_child(this, RangeSize(addr, size));
- if (bus) {
- pioInterface = newPioInterface(name + ".pio", hier, bus, this,
+ if (pio_bus) {
+ pioInterface = newPioInterface(name + ".pio", hier, pio_bus, this,
&AlphaConsole::cacheAccess);
pioInterface->addAddrRange(RangeSize(addr, size));
}
SimObjectParam<System *> system;
SimObjectParam<BaseCPU *> cpu;
SimObjectParam<Platform *> platform;
- SimObjectParam<Bus*> io_bus;
+ SimObjectParam<Bus*> pio_bus;
Param<Tick> pio_latency;
SimObjectParam<HierParams *> hier;
INIT_PARAM(system, "system object"),
INIT_PARAM(cpu, "Processor"),
INIT_PARAM(platform, "platform"),
- INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL),
+ INIT_PARAM(pio_bus, "The IO Bus to attach to"),
INIT_PARAM_DFLT(pio_latency, "Programmed IO latency", 1000),
INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams)
CREATE_SIM_OBJECT(AlphaConsole)
{
return new AlphaConsole(getInstanceName(), sim_console, disk,
- system, cpu, platform, mmu, addr, hier, io_bus);
+ system, cpu, platform, mmu, addr, hier, pio_bus);
}
REGISTER_SIM_OBJECT("AlphaConsole", AlphaConsole)
AlphaConsole(const std::string &name, SimConsole *cons, SimpleDisk *d,
System *s, BaseCPU *c, Platform *platform,
MemoryController *mmu, Addr addr,
- HierParams *hier, Bus *bus);
+ HierParams *hier, Bus *pio_bus);
virtual void startup();
using namespace std;
BadDevice::BadDevice(const string &name, Addr a, MemoryController *mmu,
- HierParams *hier, Bus *bus, const string &devicename)
+ HierParams *hier, Bus *pio_bus, const string &devicename)
: PioDevice(name, NULL), addr(a), devname(devicename)
{
mmu->add_child(this, RangeSize(addr, size));
- if (bus) {
- pioInterface = newPioInterface(name, hier, bus, this,
+ if (pio_bus) {
+ pioInterface = newPioInterface(name, hier, pio_bus, this,
&BadDevice::cacheAccess);
pioInterface->addAddrRange(RangeSize(addr, size));
}
SimObjectParam<MemoryController *> mmu;
Param<Addr> addr;
SimObjectParam<HierParams *> hier;
- SimObjectParam<Bus*> io_bus;
+ SimObjectParam<Bus*> pio_bus;
Param<Tick> pio_latency;
Param<string> devicename;
INIT_PARAM(mmu, "Memory Controller"),
INIT_PARAM(addr, "Device Address"),
INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams),
- INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL),
+ INIT_PARAM_DFLT(pio_bus, "The IO Bus to attach to", NULL),
INIT_PARAM_DFLT(pio_latency, "Programmed IO latency", 1000),
INIT_PARAM(devicename, "Name of device to error on")
CREATE_SIM_OBJECT(BadDevice)
{
- return new BadDevice(getInstanceName(), addr, mmu, hier, io_bus,
+ return new BadDevice(getInstanceName(), addr, mmu, hier, pio_bus,
devicename);
}
bm_enabled = false;
memset(cmd_in_progress, 0, sizeof(cmd_in_progress));
+ pioInterface = NULL;
+ dmaInterface = NULL;
// create the PIO and DMA interfaces
- if (params()->host_bus) {
+ if (params()->pio_bus) {
pioInterface = newPioInterface(name() + ".pio", params()->hier,
- params()->host_bus, this,
+ params()->pio_bus, this,
&IdeController::cacheAccess);
+ pioLatency = params()->pio_latency * params()->pio_bus->clockRate;
+ }
+ if (params()->dma_bus) {
dmaInterface = new DMAInterface<Bus>(name() + ".dma",
- params()->host_bus,
- params()->host_bus, 1,
- true);
- pioLatency = params()->pio_latency * params()->host_bus->clockRate;
- } else {
- pioInterface = NULL;
- dmaInterface = NULL;
+ params()->dma_bus,
+ params()->dma_bus, 1, true);
}
// setup the disks attached to controller
Param<uint32_t> pci_bus;
Param<uint32_t> pci_dev;
Param<uint32_t> pci_func;
- SimObjectParam<Bus *> io_bus;
+ SimObjectParam<Bus *> pio_bus;
+ SimObjectParam<Bus *> dma_bus;
Param<Tick> pio_latency;
SimObjectParam<HierParams *> hier;
INIT_PARAM(pci_bus, "PCI bus ID"),
INIT_PARAM(pci_dev, "PCI device number"),
INIT_PARAM(pci_func, "PCI function code"),
- INIT_PARAM_DFLT(io_bus, "Host bus to attach to", NULL),
+ INIT_PARAM(pio_bus, ""),
+ INIT_PARAM(dma_bus, ""),
INIT_PARAM_DFLT(pio_latency, "Programmed IO latency in bus cycles", 1),
INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams)
params->functionNum = pci_func;
params->disks = disks;
- params->host_bus = io_bus;
+ params->pio_bus = pio_bus;
+ params->dma_bus = dma_bus;
params->pio_latency = pio_latency;
params->hier = hier;
return new IdeController(params);
{
/** Array of disk objects */
std::vector<IdeDisk *> disks;
- Bus *host_bus;
+ Bus *pio_bus;
+ Bus *dma_bus;
Tick pio_latency;
HierParams *hier;
};
using namespace std;
IsaFake::IsaFake(const string &name, Addr a, MemoryController *mmu,
- HierParams *hier, Bus *bus, Addr size)
+ HierParams *hier, Bus *pio_bus, Addr size)
: PioDevice(name, NULL), addr(a)
{
mmu->add_child(this, RangeSize(addr, size));
- if (bus) {
- pioInterface = newPioInterface(name + ".pio", hier, bus, this,
+ if (pio_bus) {
+ pioInterface = newPioInterface(name + ".pio", hier, pio_bus, this,
&IsaFake::cacheAccess);
pioInterface->addAddrRange(RangeSize(addr, size));
}
SimObjectParam<MemoryController *> mmu;
Param<Addr> addr;
- SimObjectParam<Bus*> io_bus;
+ SimObjectParam<Bus*> pio_bus;
Param<Tick> pio_latency;
SimObjectParam<HierParams *> hier;
Param<Addr> size;
INIT_PARAM(mmu, "Memory Controller"),
INIT_PARAM(addr, "Device Address"),
- INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL),
+ INIT_PARAM_DFLT(pio_bus, "The IO Bus to attach to", NULL),
INIT_PARAM_DFLT(pio_latency, "Programmed IO latency", 1000),
INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams),
INIT_PARAM_DFLT(size, "Size of address range", 0x8)
CREATE_SIM_OBJECT(IsaFake)
{
- return new IsaFake(getInstanceName(), addr, mmu, hier, io_bus, size);
+ return new IsaFake(getInstanceName(), addr, mmu, hier, pio_bus, size);
}
REGISTER_SIM_OBJECT("IsaFake", IsaFake)
* @param size number of addresses to respond to
*/
IsaFake(const std::string &name, Addr a, MemoryController *mmu,
- HierParams *hier, Bus *bus, Addr size = 0x8);
+ HierParams *hier, Bus *pio_bus, Addr size = 0x8);
/**
* This read always returns -1.
physmem(p->pmem), intrTick(0), cpuPendingIntr(false),
intrEvent(0), interface(0)
{
- if (p->header_bus) {
+ if (p->pio_bus) {
pioInterface = newPioInterface(name() + ".pio", p->hier,
- p->header_bus, this,
+ p->pio_bus, this,
&NSGigE::cacheAccess);
+ pioLatency = p->pio_latency * p->pio_bus->clockRate;
+ }
- pioLatency = p->pio_latency * p->header_bus->clockRate;
-
+ if (p->header_bus) {
if (p->payload_bus)
dmaInterface = new DMAInterface<Bus>(name() + ".dma",
p->header_bus,
p->header_bus,
p->header_bus, 1,
p->dma_no_allocate);
- } else if (p->payload_bus) {
- pioInterface = newPioInterface(name() + ".pio", p->hier,
- p->payload_bus, this,
- &NSGigE::cacheAccess);
-
- pioLatency = p->pio_latency * p->payload_bus->clockRate;
-
- dmaInterface = new DMAInterface<Bus>(name() + ".dma",
- p->payload_bus,
- p->payload_bus, 1,
- p->dma_no_allocate);
- }
+ } else if (p->payload_bus)
+ panic("Must define a header bus if defining a payload bus");
intrDelay = p->intr_delay;
Param<uint32_t> pci_func;
SimObjectParam<HierParams *> hier;
- SimObjectParam<Bus*> io_bus;
+ SimObjectParam<Bus*> pio_bus;
+ SimObjectParam<Bus*> dma_bus;
SimObjectParam<Bus*> payload_bus;
Param<bool> dma_desc_free;
Param<bool> dma_data_free;
INIT_PARAM(pci_func, "PCI function code"),
INIT_PARAM(hier, "Hierarchy global variables"),
- INIT_PARAM(io_bus, "The IO Bus to attach to for headers"),
+ INIT_PARAM(pio_bus, ""),
+ INIT_PARAM(dma_bus, ""),
INIT_PARAM(payload_bus, "The IO Bus to attach to for payload"),
INIT_PARAM(dma_desc_free, "DMA of Descriptors is free"),
INIT_PARAM(dma_data_free, "DMA of Data is free"),
params->functionNum = pci_func;
params->hier = hier;
- params->header_bus = io_bus;
+ params->pio_bus = pio_bus;
+ params->header_bus = dma_bus;
params->payload_bus = payload_bus;
params->dma_desc_free = dma_desc_free;
params->dma_data_free = dma_data_free;
{
PhysicalMemory *pmem;
HierParams *hier;
+ Bus *pio_bus;
Bus *header_bus;
Bus *payload_bus;
Tick clock;
PciConfigAll::PciConfigAll(const string &name,
Addr a, MemoryController *mmu,
- HierParams *hier, Bus *bus, Tick pio_latency)
+ HierParams *hier, Bus *pio_bus, Tick pio_latency)
: PioDevice(name, NULL), addr(a)
{
mmu->add_child(this, RangeSize(addr, size));
- if (bus) {
- pioInterface = newPioInterface(name + ".pio", hier, bus, this,
+ if (pio_bus) {
+ pioInterface = newPioInterface(name + ".pio", hier, pio_bus, this,
&PciConfigAll::cacheAccess);
pioInterface->addAddrRange(RangeSize(addr, size));
- pioLatency = pio_latency * bus->clockRate;
+ pioLatency = pio_latency * pio_bus->clockRate;
}
// Make all the pointers to devices null
SimObjectParam<MemoryController *> mmu;
Param<Addr> addr;
Param<Addr> mask;
- SimObjectParam<Bus*> io_bus;
+ SimObjectParam<Bus*> pio_bus;
Param<Tick> pio_latency;
SimObjectParam<HierParams *> hier;
INIT_PARAM(mmu, "Memory Controller"),
INIT_PARAM(addr, "Device Address"),
INIT_PARAM(mask, "Address Mask"),
- INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL),
+ INIT_PARAM_DFLT(pio_bus, "The IO Bus to attach to", NULL),
INIT_PARAM_DFLT(pio_latency, "Programmed IO latency in bus cycles", 1),
INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams)
CREATE_SIM_OBJECT(PciConfigAll)
{
- return new PciConfigAll(getInstanceName(), addr, mmu, hier, io_bus,
+ return new PciConfigAll(getInstanceName(), addr, mmu, hier, pio_bus,
pio_latency);
}
* @param bus The bus that this device is attached to
*/
PciConfigAll(const std::string &name, Addr a, MemoryController *mmu,
- HierParams *hier, Bus *bus, Tick pio_latency);
+ HierParams *hier, Bus *pio_bus, Tick pio_latency);
/**
{
reset();
- if (p->io_bus) {
- pioInterface = newPioInterface(p->name + ".pio", p->hier, p->io_bus,
+ if (p->pio_bus) {
+ pioInterface = newPioInterface(p->name + ".pio", p->hier, p->pio_bus,
this, &Device::cacheAccess);
+ pioLatency = p->pio_latency * p->pio_bus->clockRate;
+ }
- pioLatency = p->pio_latency * p->io_bus->clockRate;
-
+ if (p->header_bus) {
if (p->payload_bus)
- dmaInterface = new DMAInterface<Bus>(p->name + ".dma", p->io_bus,
+ dmaInterface = new DMAInterface<Bus>(p->name + ".dma",
+ p->header_bus,
p->payload_bus, 1,
p->dma_no_allocate);
else
- dmaInterface = new DMAInterface<Bus>(p->name + ".dma", p->io_bus,
- p->io_bus, 1,
+ dmaInterface = new DMAInterface<Bus>(p->name + ".dma",
+ p->header_bus,
+ p->header_bus, 1,
p->dma_no_allocate);
- } else if (p->payload_bus) {
- pioInterface = newPioInterface(p->name + ".pio", p->hier,
- p->payload_bus, this,
- &Device::cacheAccess);
-
- pioLatency = p->pio_latency * p->payload_bus->clockRate;
-
- dmaInterface = new DMAInterface<Bus>(p->name + ".dma", p->payload_bus,
- p->payload_bus, 1,
- p->dma_no_allocate);
- }
+ } else if (p->payload_bus)
+ panic("must define a header bus if defining a payload bus");
}
Device::~Device()
Param<uint32_t> pci_func;
SimObjectParam<HierParams *> hier;
- SimObjectParam<Bus*> io_bus;
+ SimObjectParam<Bus*> pio_bus;
+ SimObjectParam<Bus*> dma_bus;
SimObjectParam<Bus*> payload_bus;
Param<Tick> dma_read_delay;
Param<Tick> dma_read_factor;
INIT_PARAM(pci_func, "PCI function code"),
INIT_PARAM(hier, "Hierarchy global variables"),
- INIT_PARAM(io_bus, "The IO Bus to attach to for headers"),
+ INIT_PARAM(pio_bus, ""),
+ INIT_PARAM(dma_bus, ""),
INIT_PARAM(payload_bus, "The IO Bus to attach to for payload"),
INIT_PARAM(dma_read_delay, "fixed delay for dma reads"),
INIT_PARAM(dma_read_factor, "multiplier for dma reads"),
params->functionNum = pci_func;
params->hier = hier;
- params->io_bus = io_bus;
+ params->pio_bus = pio_bus;
+ params->header_bus = dma_bus;
params->payload_bus = payload_bus;
params->dma_read_delay = dma_read_delay;
params->dma_read_factor = dma_read_factor;
Tick tx_delay;
Tick rx_delay;
HierParams *hier;
- Bus *io_bus;
+ Bus *pio_bus;
+ Bus *header_bus;
Bus *payload_bus;
Tick pio_latency;
PhysicalMemory *physmem;
using namespace std;
TsunamiCChip::TsunamiCChip(const string &name, Tsunami *t, Addr a,
- MemoryController *mmu, HierParams *hier, Bus* bus,
- Tick pio_latency)
+ MemoryController *mmu, HierParams *hier,
+ Bus* pio_bus, Tick pio_latency)
: PioDevice(name, t), addr(a), tsunami(t)
{
mmu->add_child(this, RangeSize(addr, size));
- if (bus) {
- pioInterface = newPioInterface(name + ".pio", hier, bus, this,
+ if (pio_bus) {
+ pioInterface = newPioInterface(name + ".pio", hier, pio_bus, this,
&TsunamiCChip::cacheAccess);
pioInterface->addAddrRange(RangeSize(addr, size));
- pioLatency = pio_latency * bus->clockRate;
+ pioLatency = pio_latency * pio_bus->clockRate;
}
drir = 0;
SimObjectParam<Tsunami *> tsunami;
SimObjectParam<MemoryController *> mmu;
Param<Addr> addr;
- SimObjectParam<Bus*> io_bus;
+ SimObjectParam<Bus*> pio_bus;
Param<Tick> pio_latency;
SimObjectParam<HierParams *> hier;
INIT_PARAM(tsunami, "Tsunami"),
INIT_PARAM(mmu, "Memory Controller"),
INIT_PARAM(addr, "Device Address"),
- INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL),
+ INIT_PARAM_DFLT(pio_bus, "The IO Bus to attach to", NULL),
INIT_PARAM_DFLT(pio_latency, "Programmed IO latency in bus cycles", 1),
INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams)
CREATE_SIM_OBJECT(TsunamiCChip)
{
return new TsunamiCChip(getInstanceName(), tsunami, addr, mmu, hier,
- io_bus, pio_latency);
+ pio_bus, pio_latency);
}
REGISTER_SIM_OBJECT("TsunamiCChip", TsunamiCChip)
* @param bus The bus that this device is attached to
*/
TsunamiCChip(const std::string &name, Tsunami *t, Addr a,
- MemoryController *mmu, HierParams *hier, Bus *bus,
+ MemoryController *mmu, HierParams *hier, Bus *pio_bus,
Tick pio_latency);
/**
}
TsunamiIO::TsunamiIO(const string &name, Tsunami *t, time_t init_time,
- Addr a, MemoryController *mmu, HierParams *hier, Bus *bus,
- Tick pio_latency, Tick ci)
+ Addr a, MemoryController *mmu, HierParams *hier,
+ Bus *pio_bus, Tick pio_latency, Tick ci)
: PioDevice(name, t), addr(a), clockInterval(ci), tsunami(t),
pitimer(name + "pitimer"), rtc(name + ".rtc", t, ci)
{
mmu->add_child(this, RangeSize(addr, size));
- if (bus) {
- pioInterface = newPioInterface(name + ".pio", hier, bus, this,
+ if (pio_bus) {
+ pioInterface = newPioInterface(name + ".pio", hier, pio_bus, this,
&TsunamiIO::cacheAccess);
pioInterface->addAddrRange(RangeSize(addr, size));
- pioLatency = pio_latency * bus->clockRate;
+ pioLatency = pio_latency * pio_bus->clockRate;
}
// set the back pointer from tsunami to myself
Param<time_t> time;
SimObjectParam<MemoryController *> mmu;
Param<Addr> addr;
- SimObjectParam<Bus*> io_bus;
+ SimObjectParam<Bus*> pio_bus;
Param<Tick> pio_latency;
SimObjectParam<HierParams *> hier;
Param<Tick> frequency;
INIT_PARAM(time, "System time to use (0 for actual time"),
INIT_PARAM(mmu, "Memory Controller"),
INIT_PARAM(addr, "Device Address"),
- INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL),
+ INIT_PARAM(pio_bus, "The IO Bus to attach to"),
INIT_PARAM_DFLT(pio_latency, "Programmed IO latency in bus cycles", 1),
INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams),
INIT_PARAM(frequency, "clock interrupt frequency")
CREATE_SIM_OBJECT(TsunamiIO)
{
return new TsunamiIO(getInstanceName(), tsunami, time, addr, mmu, hier,
- io_bus, pio_latency, frequency);
+ pio_bus, pio_latency, frequency);
}
REGISTER_SIM_OBJECT("TsunamiIO", TsunamiIO)
* @param mmu pointer to the memory controller that sends us events.
*/
TsunamiIO(const std::string &name, Tsunami *t, time_t init_time,
- Addr a, MemoryController *mmu, HierParams *hier, Bus *bus,
+ Addr a, MemoryController *mmu, HierParams *hier, Bus *pio_bus,
Tick pio_latency, Tick ci);
/**
TsunamiPChip::TsunamiPChip(const string &name, Tsunami *t, Addr a,
MemoryController *mmu, HierParams *hier,
- Bus *bus, Tick pio_latency)
+ Bus *pio_bus, Tick pio_latency)
: PioDevice(name, t), addr(a), tsunami(t)
{
mmu->add_child(this, RangeSize(addr, size));
tba[i] = 0;
}
- if (bus) {
- pioInterface = newPioInterface(name + ".pio", hier, bus, this,
+ if (pio_bus) {
+ pioInterface = newPioInterface(name + ".pio", hier, pio_bus, this,
&TsunamiPChip::cacheAccess);
pioInterface->addAddrRange(RangeSize(addr, size));
- pioLatency = pio_latency * bus->clockRate;
+ pioLatency = pio_latency * pio_bus->clockRate;
}
SimObjectParam<Tsunami *> tsunami;
SimObjectParam<MemoryController *> mmu;
Param<Addr> addr;
- SimObjectParam<Bus*> io_bus;
+ SimObjectParam<Bus*> pio_bus;
Param<Tick> pio_latency;
SimObjectParam<HierParams *> hier;
INIT_PARAM(tsunami, "Tsunami"),
INIT_PARAM(mmu, "Memory Controller"),
INIT_PARAM(addr, "Device Address"),
- INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL),
+ INIT_PARAM_DFLT(pio_bus, "The IO Bus to attach to", NULL),
INIT_PARAM_DFLT(pio_latency, "Programmed IO latency in bus cycles", 1),
INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams)
CREATE_SIM_OBJECT(TsunamiPChip)
{
return new TsunamiPChip(getInstanceName(), tsunami, addr, mmu, hier,
- io_bus, pio_latency);
+ pio_bus, pio_latency);
}
REGISTER_SIM_OBJECT("TsunamiPChip", TsunamiPChip)
* @param bus The bus that this device is attached to
*/
TsunamiPChip(const std::string &name, Tsunami *t, Addr a,
- MemoryController *mmu, HierParams *hier, Bus *bus,
+ MemoryController *mmu, HierParams *hier, Bus *pio_bus,
Tick pio_latency);
/**
}
-Uart8250::Uart8250(const string &name, SimConsole *c, MemoryController *mmu, Addr a,
- Addr s, HierParams *hier, Bus *bus, Tick pio_latency, Platform *p)
- : Uart(name, c, mmu, a, s, hier, bus, pio_latency, p),
+Uart8250::Uart8250(const string &name, SimConsole *c, MemoryController *mmu,
+ Addr a, Addr s, HierParams *hier, Bus *pio_bus,
+ Tick pio_latency, Platform *p)
+ : Uart(name, c, mmu, a, s, hier, pio_bus, pio_latency, p),
txIntrEvent(this, TX_INT), rxIntrEvent(this, RX_INT)
{
IER = 0;
SimObjectParam<Platform *> platform;
Param<Addr> addr;
Param<Addr> size;
- SimObjectParam<Bus*> io_bus;
+ SimObjectParam<Bus*> pio_bus;
Param<Tick> pio_latency;
SimObjectParam<HierParams *> hier;
INIT_PARAM(platform, "Pointer to platfrom"),
INIT_PARAM(addr, "Device Address"),
INIT_PARAM_DFLT(size, "Device size", 0x8),
- INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL),
+ INIT_PARAM(pio_bus, ""),
INIT_PARAM_DFLT(pio_latency, "Programmed IO latency in bus cycles", 1),
INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams)
CREATE_SIM_OBJECT(Uart8250)
{
- return new Uart8250(getInstanceName(), console, mmu, addr, size, hier, io_bus,
- pio_latency, platform);
+ return new Uart8250(getInstanceName(), console, mmu, addr, size, hier,
+ pio_bus, pio_latency, platform);
}
REGISTER_SIM_OBJECT("Uart8250", Uart8250)
public:
Uart8250(const std::string &name, SimConsole *c, MemoryController *mmu,
- Addr a, Addr s, HierParams *hier, Bus *bus, Tick pio_latency,
+ Addr a, Addr s, HierParams *hier, Bus *pio_bus, Tick pio_latency,
Platform *p);
virtual Fault read(MemReqPtr &req, uint8_t *data);
abstract = True
addr = Param.Addr("Device Address")
mmu = Param.MemoryController(Parent.any, "Memory Controller")
- io_bus = Param.Bus(NULL, "The IO Bus to attach to")
+ pio_bus = Param.Bus(NULL, "Bus to attach to for PIO")
pio_latency = Param.Tick(1, "Programmed IO latency in bus cycles")
class FooDmaDevice(FooPioDevice):
type = 'DmaDevice'
abstract = True
+ dma_bus = Param.Bus(Self.pio_bus, "Bus to attach to for DMA")
class PioDevice(FooPioDevice):
type = 'PioDevice'
class DmaDevice(PioDevice):
type = 'DmaDevice'
abstract = True
-
+ dma_bus = Param.Bus(Self.pio_bus, "Bus to attach to for DMA")