+2014-11-21 James Greenhalgh <james.greenhalgh@arm.com>
+
+ * config/aarch64/aarch64-simd.md
+ (aarch64_<ANY_EXTEND:su><ADDSUB:optab>l<mode>): Add a tab between
+ output mnemonic and operands.
+ (aarch64_simd_vec_unpack<su>_lo_<mode>): Likewise.
+ (aarch64_simd_vec_unpack<su>_hi_<mode>): Likewise.
+
2014-11-21 Evgeny Stupachenko <evstupac@gmail.com>
* config/i386/i386.c (ix86_option_override_internal): Increase
(match_operand:VQW 2 "vect_par_cnst_lo_half" "")
)))]
"TARGET_SIMD"
- "<su>shll %0.<Vwtype>, %1.<Vhalftype>, 0"
+ "<su>shll\t%0.<Vwtype>, %1.<Vhalftype>, 0"
[(set_attr "type" "neon_shift_imm_long")]
)
(match_operand:VQW 2 "vect_par_cnst_hi_half" "")
)))]
"TARGET_SIMD"
- "<su>shll2 %0.<Vwtype>, %1.<Vtype>, 0"
+ "<su>shll2\t%0.<Vwtype>, %1.<Vtype>, 0"
[(set_attr "type" "neon_shift_imm_long")]
)
(ANY_EXTEND:<VWIDE>
(match_operand:VDW 2 "register_operand" "w"))))]
"TARGET_SIMD"
- "<ANY_EXTEND:su><ADDSUB:optab>l %0.<Vwtype>, %1.<Vtype>, %2.<Vtype>"
+ "<ANY_EXTEND:su><ADDSUB:optab>l\t%0.<Vwtype>, %1.<Vtype>, %2.<Vtype>"
[(set_attr "type" "neon_<ADDSUB:optab>_long")]
)