insn_force_nop /* invalid opcode prefix */
};
-struct insn_info
+struct z80_insn_info
{
gdb_byte code;
gdb_byte mask;
/* Constants */
-static const struct insn_info *
+static const struct z80_insn_info *
z80_get_insn_info (struct gdbarch *gdbarch, const gdb_byte *buf, int *size);
static const char *z80_reg_names[] =
ULONGEST addr;
int opcode;
int size;
- const struct insn_info *info;
+ const struct z80_insn_info *info;
std::vector<CORE_ADDR> ret (1);
struct gdbarch *gdbarch = target_gdbarch ();
{
gdb_byte buf[8];
int size;
- const struct insn_info *info;
+ const struct z80_insn_info *info;
read_memory (addr, buf, sizeof(buf));
info = z80_get_insn_info (gdbarch, buf, &size);
if (info)
{
gdb_byte buf[8];
int size;
- const struct insn_info *info;
+ const struct z80_insn_info *info;
read_memory (addr, buf, sizeof(buf));
info = z80_get_insn_info (gdbarch, buf, &size);
if (info)
{
gdb_byte buf[8];
int size;
- const struct insn_info *info;
+ const struct z80_insn_info *info;
read_memory (addr, buf, sizeof(buf));
info = z80_get_insn_info (gdbarch, buf, &size);
if (info)
}
/* Table to disassemble machine codes without prefix. */
-static const struct insn_info
+static const struct z80_insn_info
ez80_main_insn_table[] =
{ /* table with double prefix check */
{ 0100, 0377, 0, insn_force_nop}, //double prefix
{ 0000, 0000, 1, insn_default } //others
} ;
-static const struct insn_info
+static const struct z80_insn_info
ez80_adl_main_insn_table[] =
{ /* table with double prefix check */
{ 0100, 0377, 0, insn_force_nop}, //double prefix
/* ED prefix opcodes table.
Note the instruction length does include the ED prefix (+ 1 byte)
*/
-static const struct insn_info
+static const struct z80_insn_info
ez80_ed_insn_table[] =
{
/* eZ80 only instructions */
{ 0000, 0000, 1, insn_default }
};
-static const struct insn_info
+static const struct z80_insn_info
ez80_adl_ed_insn_table[] =
{
{ 0002, 0366, 2, insn_default }, //"lea rr,ii+d"
};
/* table for FD and DD prefixed instructions */
-static const struct insn_info
+static const struct z80_insn_info
ez80_ddfd_insn_table[] =
{
/* ez80 only instructions */
{ 0000, 0000, 0, insn_default } //not an instruction, exec DD/FD as NOP
};
-static const struct insn_info
+static const struct z80_insn_info
ez80_adl_ddfd_insn_table[] =
{
{ 0007, 0307, 2, insn_default }, //"ld rr,(ii+d)"
/* Return pointer to instruction information structure corresponded to opcode
in buf. */
-static const struct insn_info *
+static const struct z80_insn_info *
z80_get_insn_info (struct gdbarch *gdbarch, const gdb_byte *buf, int *size)
{
int code;
- const struct insn_info *info;
+ const struct z80_insn_info *info;
unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
*size = 0;
switch (mach)