Address MSC compiler issues in d10v_sim.h

diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog
index bee6a0cfaaa9f6c7896998a982fb3ae78ed4bb7d..21f222ea90cfd8a6d692cce1c04f929d33d384e4 100644 (file)
--- a/sim/d10v/ChangeLog
+++ b/sim/d10v/ChangeLog
@@ -1,3 +1,11 @@
+Fri Oct 24 10:26:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+       * d10v_sim.h: Include sim-types.h.
+       (uint8, in816, uiny16, int32, uint32, int64, uint64): Typedef
+       using unsigned8 et.al. from sim-types.h.
+       (SEXT32, SEXT40, SEXT44, SEXT60): Replace GCC specific 0x..LL with
+       SIGNED64 macro.
+
 Wed Oct 22 14:43:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 
        * interp.c (sim_write_phys): New function, write to physical